ADM7008
Product Review
TDR
Time Domain Reflectometry
Twisted Pair
TP
TP-PMD
TTL
Twisted Pair Physical Medium Dependent
Transistor Transistor Logic
Transmission Clock (MII)
Transmission Clock (SMII/SS_SMII)
Transmission Data
TXC
TXCLK
TXD
TXEN
TXER
TXN
TXP
Transmission Enable
Transmission Error
Transmission Negative
Transmission Positive
/J/K
5B signal to detect the start of a frame
5B signal to detect the end of a frame
/T/R
1.5 Conventions
1.5.1 Data Lengths
qword
dword
word
64-bits
32-bits
16-bits
8 bits
byte
nibble
4 bits
1.5.2 Register Type Descriptions
Register Type
Description
RO
R/W
SC
Read Only
Read and Write capable
Self-clearing
Latching low, unlatch on read
Latching high, unlatch on read
Clear On Read
LL
LH
COR
1.5.3 Pin Type Descriptions
Pin Type
I:
Description
Input
O:
Output
I/O:
Bi-directional
Open drain
Schmitt Trigger
Pull Up
OD:
SCHE:
PU:
PD:
Pull Down
ADMtek Inc.
1-5
ETC [ ETC ]
