ST90158 - GENERAL DESCRIPTION
Figure 2. ST90135 Block Diagram
ADDRESS
DATA
Port0
P0[7:0]
ROM
up to 32
Kbytes
ADDRESS
P1[7:0]
Port1
P0[7:0]
P1[7:0]
P2[6:0]
P4[7:0]
RAM
up to 1 Kbyte
Fully Prog.
I/Os
P5[7:3], P5.1
P6[6:0]
P7[7:0]
P8[7:0]
P9[7:4], P9[2:0]
AS
WAIT
NMI
R/W
DS
256 bytes
Register File
8/16 bits
CPU
STOUT
STIM
SPI
Interrupt
Management
INT0-7
SDI
SDO
SCK
ST9 CORE
RCCU
2
I C/IM Bus
OSCIN
OSCOUT
RESET
INTCLK
CKAF
A/D
EXTRG
AIN[7:0]
Converter
with analog
watchdog
WDIN
WDOUT
HW0SW1
WATCHDOG
MFT1
TX0CKIN
RX0CKIN
S0IN
T1OUTA
T1OUTB
T1INA
SCI0
DCD0
T1INB
S0OUT
CLK0OUT
RTS0
T3OUTA
T3OUTB
T3INA
MFT3
T3INB
All alternate functions (Italic characters) are mapped on Port2 through Port9
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