PIC16F87X
REGISTER 8-1: CCP1CON REGISTER/CCP2CON REGISTER (ADDRESS: 17h/1dh)
U-0
—
bit7
U-0
—
R/W-0
CCPxX
R/W-0
CCPxY
R/W-0
CCPxM3
R/W-0
CCPxM2
R/W-0
CCPxM1
R/W-0
CCPxM0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as
‘0’
- n = Value at POR reset
bit 7-6:
Unimplemented:
Read as '0'
bit 5-4:
CCPxX:CCPxY:
PWM Least Significant bits
Capture Mode: Unused
Compare Mode: Unused
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
bit 3-0:
CCPxM3:CCPxM0:
CCPx Mode Select bits
0000
= Capture/Compare/PWM off (resets CCPx module)
0100
= Capture mode, every falling edge
0101
= Capture mode, every rising edge
0110
= Capture mode, every 4th rising edge
0111
= Capture mode, every 16th rising edge
1000
= Compare mode, set output on match (CCPxIF bit is set)
1001
= Compare mode, clear output on match (CCPxIF bit is set)
1010
= Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is unaffected)
1011
= Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected); CCP1 resets
TMR1; CCP2 resets TMR1 and starts an A/D conversion (if A/D module is enabled)
11xx
= PWM mode
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DS30292B-page 58
1999 Microchip Technology Inc.
ETC [ ETC ]
