IP1001 LF
Data Sheet
4.1
Bit
Control Register (Reg0)
HW
Reset Reset
SW
Name
Description
Type
0.5:0
0.6
Reserved
RO
Always 0
Speed Selection
(MSB)
0.6
1
0.13
R/W
1
NA
1
0
1
0
Reserved
1000Mb/s
100Mb/s
10Mb/s
1
0
0
0.7
0.8
0.9
0.10
Collision Test
Duplex Mode
1: Enable COL signal test
0: Disable COL signal test
R/W
R/W
0
1
0
0
0
1: Full duplex
0: Half duplex
NA
SC
0
Restart Auto-NEG 1: Restart Auto-Negotiation Process
0: Normal operation
R/W
SC
Isolate
1: Isolate PHY from MII, GMII, or RGMII
electrically
R/W
0: normal operation
0.11
0.12
0.13
0.14
0.15
Power Down
1: Power down
0: Normal operation
R/W
R/W
R/W
R/W
0
1
0
0
0
0
Auto-Negotiation
Enable
1: Enable Auto-Negotiation Process
0: Disable Auto-Negotiation Process
NA
NA
0
Speed Selection
(LSB)
Please refer to bit 0.6 for detail information
Loopback
1: Enable loop back mode
0: Disable loop back mode
Software Reset
1: PHY software reset
0: normal operation
R/W
SC
0 (SC)
27/48
Dec. 18, 2007
IP1001-DS-R06
Copyright © 2006, IC Plus Corp.
ETC [ ETC ]
