RTL8201N
Datasheet
7.7. Register 6 Auto-Negotiation Expansion Register (ANER)
This register contains additional status for NWay auto-negotiation.
Table 16. Register 6 Auto-Negotiation Expansion Register (ANER)
Name Description
Address
6:15~5
6:4
Mode
Default
Reserved
MLF
This bit is permanently set to 0.
Indicates whether a multiple link fault has occurred.
1: Fault occurred
RO
0
0: No fault occurred
6:3
LP_NP_ABLE Indicates whether the link partner supports Next Page negotiation.
RO
0
1: Supported
0: Not supported
6:2
6:1
NP_ABLE
PAGE_RX
This bit indicates whether the local node is able to send additional
Next Pages. Internal use only.
RO
RO
0
0
This bit is set when a new Link Code Word Page has been
received. It is automatically cleared when the auto-negotiation link
partner’s ability register (register 5) is read by management.
6:0
LP_NW_ABLE 1: Link partner supports NWay auto-negotiation.
RO
0
7.8. Register 16 NWay Setup Register (NSR)
Table 17. Register 16 NWay Setup Register (NSR)
Address
16:15~12
16:11
16:10
16:9
Name
Reserved
ENNWLE
Testfun
Description
Mode
-
Default
-
-
0
0
0
-
1: LED4 Pin indicates link pulse
1: Auto-negotiation speeds up internal timer
1: Set NWay to loopback mode
-
RW
RW
RW
-
NWLPBK
Reserved
FLAGABD
FLAGPDF
FLAGLSC
16:8~3
16:2
1: Auto-negotiation experienced ability detect state
1: Auto-negotiation experienced parallel detection fault state
1: Auto-negotiation experienced link status check state
RO
RO
RO
0
0
0
16:1
16:0
7.9. Register 17 Loopback, Bypass, Receiver Error Mask Register
(LBREMR)
Table 18. Register 17 Loopback, Bypass, Receiver Error Mask Register (LBREMR)
Address
17:15
Name
RPTR
Description
Mode
RW
Default
Set to 1 to put the RTL8201N into repeater mode.
0
0
17:14
BP_4B5B
Assertion of this bit allows bypassing of the 4B/5B & 5B/4B
encoder.
RW
17:13
BP_SCR
Assertion of this bit allows bypassing of the
scrambler/descrambler.
RW
0
17:12
17:11
LDPS
Set to 1 to enable Link Down Power Saving mode.
RW
RW
0
0
AnalogOFF
Set to 1 to power down analog function of transmitter and receiver.
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
With Auto MDIX
14
Rev. 1.2
ETC [ ETC ]
