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EPF10K30EQC208-3 参数 Datasheet PDF下载

EPF10K30EQC208-3图片预览
型号: EPF10K30EQC208-3
PDF下载: 下载PDF文件 查看货源
内容描述: 现场可编程门阵列(FPGA)的\n [Field Programmable Gate Array (FPGA) ]
分类和应用: 现场可编程门阵列
文件页数/大小: 120 页 / 1759 K
品牌: ETC [ ETC ]
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FLEX 10KE Embedded Programmable Logic Family Data Sheet  
Table 4. FLEX 10KE Package Sizes  
Device  
144-  
Pin  
TQFP  
208-Pin  
PQFP  
240-Pin 256-Pin 356- 484-Pin 599-Pin  
600- 672-Pin  
Pin FineLine  
PQFP  
RQFP  
FineLine Pin FineLine  
PGA  
BGA  
BGA  
BGA  
BGA  
BGA  
Pitch (mm)  
Area (mm2)  
0.50  
484  
0.50  
936  
0.50  
1.0  
1.27  
1.0  
1.27  
1.0  
1,197  
289  
1,225  
529  
3,904  
2,025  
729  
Length × width 22 × 22 30.6 × 30.6 34.6 × 34.6 17 × 17 35 × 35 23 × 23 62.5 × 62.5 45 × 45 27 × 27  
(mm × mm)  
Altera FLEX 10KE devices are enhanced versions of FLEX 10K devices.  
Based on reconfigurable CMOS SRAM elements, the FLEX architecture  
incorporates all features necessary to implement common gate array  
megafunctions. With up to 200,000 typical gates, FLEX 10KE devices  
provide the density, speed, and features to integrate entire systems,  
including multiple 32-bit buses, into a single device.  
General  
Description  
The ability to reconfigure FLEX 10KE devices enables 100% testing prior  
to shipment and allows the designer to focus on simulation and design  
verification. FLEX 10KE reconfigurability eliminates inventory  
management for gate array designs and generation of test vectors for fault  
coverage.  
Table 5 shows FLEX 10KE performance for some common designs. All  
performance values were obtained with Synopsys DesignWare or LPM  
functions. Special design techniques are not required to implement the  
applications; the designer simply infers or instantiates a function in a  
Verilog HDL, VHDL, Altera Hardware Description Language (AHDL), or  
schematic design file.  
4
Altera Corporation