Chapter 1 Interface Block
Chapter 1 Interface Block
Switching speed
t LD0 (ns)
CMOS 5.0 V
Function
Output Buffer
no resistor
Block type
Path
→
t 1
T
Block type
IN
OUT
MIN.
0.459
0.563
0.473
0.469
0.516
0.521
0.361
0.315
0.422
0.373
0.481
0.441
TYP. MAX. MIN.
TYP. MAX. MIN.
TYP. MAX.
Drivability
1mA
with 50 KΩ P/D
with 50 KΩ P/U
with 5 KΩ P/U
I/O cells int. Cells
(HH)
(LL)
(HH)
(LL)
(HH)
(LL)
(HH)
(LL)
(HH)
(LL)
(HH)
(LL)
0.744
1.047
0.745
0.819
0.806
0.867
0.564
0.559
0.657
0.641
0.746
0.746
1.554
2.482
1.534
1.792
1.685
1.817
1.173
1.217
1.358
1.358
1.528
1.536
0.042
0.077
0.028
0.038
0.017
0.026
0.014
0.019
0.010
0.013
0.008
0.010
0.056
0.103
0.037
0.052
0.023
0.035
0.019
0.026
0.014
0.018
0.012
0.014
0.079
0.151
0.053
0.075
0.034
0.051
0.028
0.038
0.022
0.026
0.020
0.021
FO09
FO04
FO01
FO02
FO03
FO06
A
A
A
A
A
A
→
→
→
→
→
→
Y
Y
Y
Y
Y
Y
2mA
3mA
FO09
1
4
6mA
FO04
FO01
1
1
4
4
9mA
12mA
18mA
24mA
FO02
FO03
FO06
1
1
1
12
12
12
Input
Output
Logic Diagram
Block type
FO09
Symbol Fan-in Symbol Fan-out
A
A
A
A
A
A
6.2
Y
Y
Y
Y
Y
Y
-
-
-
-
-
-
FO04
FO01
FO02
FO03
FO06
6.2
A
H01
N01
Y
6.2
18.7
18.7
18.7
Truth Table
A
Y
1
0
1
0
Block Library A13872EJ5V0BL
1 - 12
Block Library A13872EJ5V0BL
1 - 13
ETC [ ETC ]
