Chapter 1 Interface Block
Chapter 1 Interface Block
Switching speed
t LD0 (ns)
5.0 V
Function
Input Buffer with failsafe
Block type
FIA1
Path
→
t 1
T
Block type
IN
OUT
MIN.
0.160
0.103
0.160
0.103
0.672
0.903
0.672
0.903
TYP. MAX. MIN.
TYP. MAX. MIN.
TYP. MAX.
Function
Normal
Schmitt
Clock
no resistor
FIA1
with 50 KΩ P/D
with 50 KΩ P/U
with 5 KΩ P/U
I/O cells int. Cells
(HH)
(LL)
(HH)
(LL)
(HH)
(LL)
(HH)
(LL)
0.236
0.169
0.236
0.169
0.948
1.328
0.948
1.328
0.452
0.328
0.452
0.328
1.621
2.208
1.621
2.208
0.007
0.010
0.007
0.010
0.008
0.009
0.008
0.009
0.010
0.012
0.010
0.012
0.011
0.012
0.011
0.012
0.014
0.017
0.014
0.017
0.017
0.016
0.017
0.016
A
A
A
A
→
→
→
→
Y
Y
Y
Y
FDA1
1
1
3
6
FDA1
FIE1W
FDE1W
FIE1W
FDE1W
Logic Diagram for "Normal"
Truth Table
A
Y
A
H01
N01
Y
1
0
1
0
Logic Diagram for "Schmitt"
Input
Output
Block type
FIA1 to FDA1
Symbol Fan-In Symbol Fan-Out
A
-
Y
52
A
H01
N01
Y
FIE1W to FDE1W
A
-
Y
42
Logic Diagram for "Clock"
Block Library A13872EJ5V0BL
1 - 6
Block Library A13872EJ5V0BL
1 - 7
ETC [ ETC ]
