7. Definition of Propagation Delays
(1) Input Buffer
Input
V
I
VI = 2.5 V (CMOS level input)
VI = 1.5 V (TTL level input)
↓
Output
50%
tPD
(Internal supply voltage range) × 50 %
(2) Output Buffer (L→H, H→L, Z→H, Z→L)
Input
50%
(Internal supply voltage range) × 50 %
↓
Output
V
O
VO = 2.5 V (CMOS level input)
tPD
• Z → H (The beginning of VO = L level)
• Z → L (The beginning of VO = H level)
(3) Output Buffer (L→Z, H→Z)
Input
50%
(Internal supply voltage range) × 50 %
↓
VO = 0.1 V × VDD (L→Z)
VO = 0.9 V × VDD (H→Z)
Output
V
O
O
V
Output
tPD
Preface-6
Block Library A13872EJ5V0BL