Chapter 2 Function Block
D-F/F (CB) with RB, 2 to 1 Selector
Chapter 2 Function Block
Switching speed
Function
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
Standard type
Low Gate type
Block type
IN
CB
OUT
MIN.
(LH) 0.447
(LL) 0.375
(LH) 0.475
0.582
0.199
(LH) 0.304
TYP. MAX.
MIN.
0.012
0.010
0.012
0.010
0.010
0.012
TYP. MAX. Symbol Fanin Symbol Fanout
Normal
Q output
QB output
Normal
Q output
QB output
0.755
0.614
0.787
0.985
0.310
0.566
1.491
1.151
1.501
1.939
0.533
1.027
1.500
1.490
1.620
0.020
0.030
0.000
0.000
1.110
2.260
1.336
1.493
1.155
0.535
1.500
1.490
1.620
0.020
0.030
0.000
0.000
1.110
1.815
0.835
0.978
1.143
1.458
1.490
1.490
1.610
0.030
0.040
0.000
0.000
1.040
1.473
1.759
0.016
0.013
0.016
0.013
0.013
0.016
0.023
0.017
0.022
0.017
0.017
0.022
D0
D1
CB
RB
A
1.0
1.0
1.0
2.2
1.0
Q
31
31
F665S
→
Q
Drivability
Name cells
Name cells
Name cells
Name cells
Name cells
Name cells
QB
CB
→
QB
Low Power
(LL)
(LL)
F665S
11
F665SQ
10
F665SB
10
x1
x2
x4
RB
RB
→
→
Q
QB
Set up time
Set up time
Set up time
Hold time
Hold time
Hold time
Release time
Removal time
Min Pulse
D0
D1
A
D0
D1
A
RB
RB
CB
RB
0.710
0.700
0.710
0.250
0.250
0.280
0.190
0.650
0.784
0.546
Logic Diagram for "Normal"
Truth Table for "Normal"
D0
D1
CB
RB
A
Q
QB
D0 H01
D1 H02
N01
Q
0
1
X
X
X
0
1
1
1
1
1
1
0
0
0
0
1
1
1
X
0
1
1
0
CB H03
X
X
X
X
X
Hold
1
Min Pulse
A
H05
N02 QB
(LH) 0.446
0.756
0.613
0.312
0.012
0.010
0.010
0.016
0.013
0.013
0.023
0.017
0.017
D0
D1
CB
RB
A
1.0
1.0
1.0
2.3
1.0
Q
31
0
1
F665SQ
CB
→
Q
Q
(LL)
(LL)
D0
D1
A
D0
D1
A
RB
RB
CB
RB
0.375
0.199
0.710
0.700
0.710
0.250
0.250
0.280
0.190
0.650
0.650
0.383
1
0
H04
RB
RB
→
X
X
Hold
1
Set up time
Set up time
Set up time
Hold time
Hold time
Hold time
Release time
Removal time
Min Pulse
X
0
X:Irrelevant
Logic Diagram for "Q output"
Truth Table for "Q output"
D0
D1
CB
RB
A
Q
D0 H01
D1 H02
N01
Q
Min Pulse
0
1
X
X
X
0
1
1
1
1
1
1
0
0
0
0
1
1
1
X
0
1
(LH) 0.319
(LL) 0.359
(LH) 0.329
0.519
0.601
0.757
0.012
0.011
0.012
0.016
0.014
0.016
0.023
0.020
0.023
D0
D1
CB
RB
A
1.0
1.0
1.0
2.3
1.0
QB
31
F665SB
CB
→
QB
QB
CB H03
X
X
X
X
X
Hold
0
RB
→
A
H05
Set up time
Set up time
Set up time
Hold time
Hold time
Hold time
Release time
Removal time
Min Pulse
D0
D1
A
D0
D1
A
RB
RB
CB
RB
0.720
0.710
0.710
0.260
0.260
0.280
0.190
0.610
0.573
0.635
1
1
H04
RB
X
X
Hold
0
X
X:Irrelevant
Logic Diagram for "QB output"
Truth Table for "QB output"
Min Pulse
D0
D1
CB
RB
A
QB
D0 H01
D1 H02
0
1
X
X
X
0
1
1
1
1
1
1
0
0
0
0
1
1
1
X
1
0
CB H03
X
X
X
X
X
Hold
1
A
H05
N01 QB
1
0
H04
RB
X
X
Hold
1
X
X:Irrelevant
Block Library A13872EJ5V0BL
2 - 302
Block Library A13872EJ5V0BL
2 - 303
ETC [ ETC ]
