9. Clock stop register 1 (CKSTPR1)
Bit
7
6
5
4
3
2
1
0
S1CKSTP S31CKSTP S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
1
1
1
1
1
1
1
Initial value
Read/Write
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bits relating to SCI3 are described here. For details of the other bits, see the
sections on the relevant modules.
Bit 6: SCI3-1 module standby mode control (S31CKSTP)
Bit 6 controls setting and clearing of module standby mode for SCI31.
S31CKSTP Description
0
1
SCI3-1 is set to module standby mode*1
SCI3-1 module standby mode is cleared
(initial value)
Note: 1. Setting to module standby mode resets all the registers in SCI31.
Bit 5: SCI3-2 module standby mode control (S32CKSTP)
Bit 5 controls setting and clearing of module standby mode for SCI32.
S32CKSTP Description
0
1
SCI3-2 is set to module standby mode*1
SCI3-2 module standby mode is cleared
(initial value)
Note: 1. Setting to module standby mode resets all the registers in SCI32.
287
ETC [ ETC ]
