(3) Clear SNC1 in SCR1 to 0, and clear or set SNC0 to 0 or 1, to select 8-bit mode or 16-bit mode.
Set MRKON to 1 in SCR1 to select SSB mode.
(4) Write the transfer data to SDRL/SDRU. Set the tail mark with LTCH in SCR1.
8-bit transfer mode: SDRL
16-bit transfer mode: Upper byte to SDRU, lower byte to SDRL
(5) When STF is set to 1 in SCSR1, SCI1 starts operating and transmit data is output from the SO1
pin.
(6) After 8-bit or 16-bit data has been transmitted, STF is reset to 0 in SCSR1 and at the same time
IRRS1 is set to 1 in IRR2. Following data transmission, the selected tail mark is output. MTRF
is set to 1 in SCSR1 during tail mark output.
Data can be transmitted continuously by repeating steps (4) to (6). Ensure that SCI1 is in the idle
state before modifying the MRKON bit in SCR1.
10.2.5
Interrupt Source
SCI1 has one interrupt source: transfer completion.
When SCI1 completes transfer, IRRS1 is set to 1 in IRR1. The SCI1 interrupt source can be
enabled or disabled by the IENS1 bit in IENR1.
For details, see 3.3, Interrupts.
10.2.6
Application Note
(1) When SCK1 is designated as an input pin and an external clock is selected as the clock source,
the external clock must not be input before transfer operation is started by setting STF to 1 in
SCSR1.
(2) In subactive or subsleep mode, SCI1 can be used only when the CPU operation clock is øW/2.
265
ETC [ ETC ]
