APEX 20K Programmable Logic Device Family Data Sheet
Table 2. APEX 20K Device Features
Note (1)
Feature
EP20K300E EP20K400 EP20K400E EP20K600E EP20K1000E EP20K1500E
Maximum
728,000
1,052,000
1,052,000
1,537,000
1,772,000
2,392,000
system gates
Typical gates
LEs
300,000
11,520
72
400,000
16,640
104
400,000
16,640
104
600,000
24,320
152
1,000,000
38,400
160
1,500,000
51,840
216
ESBs
Maximum
RAM bits
147,456
212,992
212,992
311,296
327,680
442,368
Maximum
1,152
408
1,664
502
1,664
488
2,432
588
2,560
708
3,456
808
macrocells
Maximum user
I/O pins
Note to tables:
(1) The embedded IEEE Std. 1149.1 Joint Test Action Group (JTAG) boundary-scan circuitry contributes up to
57,000 additional gates.
ꢀ
Designed for low-power operation
...and More
Features
–
–
1.8-V and 2.5-V supply voltage (see Table 3)
MultiVoltTM I/ O interface support to interface with 1.8-V, 2.5-V,
3.3-V, and 5.0-V devices (see Table 3)
–
ESB offering programmable power-saving mode
Table 3. APEX 20K Supply Voltages
Feature
Device
EP20K100
EP20K200
EP20K400
EP20K30E
EP20K60E
EP20K100E
EP20K160E
EP20K200E
EP20K300E
EP20K400E
EP20K600E
EP20K1000E
EP20K1500E
Internal supply voltage (V
) 2.5 V
1.8 V
CCINT
MultiVolt I/O interface voltage
2.5 V, 3.3 V, 5.0 V (1) 1.8 V, 2.5 V, 3.3 V,
5.0 V (2)
levels (V
)
CCIO
Notes:
(1) Certain APEX 20K devices are 5.0-V tolerant. See “MultiVolt I/ O Interface” on page
46 for details.
(2) APEX 20KE devices can be 5.0-V tolerant by using an external resistor.
2
Altera Corporation
ETC [ ETC ]
