Si3210/Si3211/Si3212
Control Registers
Note: Any register not listed here is reserved and must not be written.
Table 34. Direct Register Summary
Register Name
Bit 7
Bit 6
Bit 5
Setup
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
2
SPI Mode Select
SPIDC
SPIM
PNI[1:0]
PCME
RNI[3:0]
PCM Mode Select
PCMF[1:0]
PCMT
GCI
TRI
PCM Transmit Start
Count—Low Byte
TXS[7:0]
3
4
5
6
PCM Transmit Start
Count—High Byte
TXS[9:8]
PCM Receive Start
Count—Low Byte
RXS[7:0]
PCM Receive Start
Count—High Byte
RXS[9:8]
1
1
1
1
1
Digital Input/Output
Control
DOUT
DIO2
DIO1
PD2
PD1
Audio
8
Audio Path Loopback
Control
ALM2
DLM
ALM1
9
Audio Gain Control
RXHP
TXHP
TXM
RXM
ATX[1:0]
TISE
ARX[1:0]
10
Two-Wire Impedance
Synthesis Control
CLC[1:0]
TISS[2:0]
11
Hybrid Control
HYBP[2:0]
Powerdown
PMON DCOF
ADCM ADCON DACM DACON
Interrupts
PMAP RGIP
HYBA[2:0]
2
14
15
Power Down Control 1
Power Down Control 2
MOF
BIASOF SLICOF
GMM
GMON
18
19
20
21
22
23
24
Interrupt Status 1
Interrupt Status 2
Interrupt Status 3
Interrupt Enable 1
Interrupt Enable 2
Interrupt Enable 3
Decode Status
PMIP
Q6AP
RGAP
Q3AP
O2IP
O2AP
Q1AP
CMCP
O2AE
Q1AE
CMCE
O1IP
LCIP
O1AP
RTIP
Q5AP
Q4AP
Q2AP
3
3
INDP DTMFP
PMIE
Q6AE
PMAE
Q5AE
RGIE
Q4AE
RGAE
Q3AE
O2IE
O1IE
LCIE
O1AE
RTIE
Q2AE
INDE DTMFE
3
3
VAL
DIG[3:0]
Indirect Register Access
Notes:
1. Si3211 and Si3212 only.
2. Si3210 only.
3. Si3210 and Si3211 only.
50
Preliminary Rev. 1.11
ETC [ ETC ]
