RTL8201BL
4) MII/SNIB: Pull high to set RTL8201BL into MII mode operation, which is the default mode for the RTL8201. This pin
pulled low will set the RTL8201BL into SNI mode operation. When set to SNI mode, the RTL8201BL will work at
10Mbps. Please refer to the section covering Serial Network Interface for more detail information.
5) ANE pin: Pull high to enable Auto-negotiation (default). Pull low to disable auto-negotiation and activate the parallel
detection mechanism. Please refer to the section covering Auto-negotiation and Parallel Detection
6) Speed pin: When ANE is pulled high, the ability to adjust speed is setup. When ANE is pulled low, pull this pin low to
force 10Mbps operation and high to force 100Mbps operation. Please refer to the section on Auto-negotiation and Parallel
Detection.
7) DUPLEX pin: When ANE is pulled high, the ability to adjust the DUPLEX pin will be setup. When ANE is pulled low,
pull this pin low to force half duplex and high to force full duplex operation. Please refer to the section covering
Auto-negotiation and Parallel Detection.
7.5 LED and PHY Address Configuration
In order to reduce the pin count on the RTL8201BL, the LED pins are duplexed with the PHY address pins. Because the
PHYAD strap options share the LED output pins, the external combinations required for strapping and LED usage must be
considered in order to avoid contention. Specifically, when the LED outputs are used to drive LEDs directly, the active state of
each output driver is dependent on the logic level sampled by the corresponding PHYAD input upon power-up/reset. For
example, as following left figure shows, if a given PHYAD input is resistively pulled high then the corresponding output will
be configured as an active low driver. As right figure shows, if a given PHYAD input is resistively pulled low then the
corresponding output will be configured as an active high driver. The PHY address configuration pins should not be connected
to GND or VCC directly, but must be pulled high or low through a resistor (ex 5.1KΩ). If no LED indications are needed, the
components of the LED path (LED+510Ω) can be removed.
VCC
PAD[0:4]/
LED[0:4]
LED
LED
5.1K ohm
510 ohm
510 ohm
5.1K ohm
PAD[0:4]/
LED[0:4]
PHY address[:] = logic 1
PHY address[:] = logic 0
LED indication = active low
LED indication = active High
LED0 Link
LED1 Full Duplex
LED2 Link 10-Activity
LED3 Link 100-Activity
LED4 Collision
LED Definitions
7.6 Serial Network Interface
The RTL8201BL also supports the traditional 7-wire serial interface to cooperate with legacy MACs or embedded systems. To
setup for this mode of operation, pull the MII/SNIB pin low and by doing so, the RTL8201BL will ignore the setup of the
ANE and SPEED pins. In this mode, the RTL8201BL will set the default to work in 10Mbps and Half-duplex mode. But the
RTL8201BL may also support full duplex mode operation if the DUPLEX pin has been pulled high.
2002-03-29
Rev.1.2
17
ETC [ ETC ]
