NT6881
10th
CLK
11th
CLK
2nd
CLK
1st
CLK
9th
CLK
CLK
I/O Inhibit
T7
T6
T9
T10
T8
Bit 0
DATA
Start Bit
Parity Bit
Stop Bit
Line Control Bit
Auxiliary Device Receiving Data Timings
Timing
Description
MIN/MAX
T6
T7
Duration of CLK interface (LOW)
Duration of CLK active (HIGH)
30/50us
u
30/50 s
Time from inactive to active CLK transition, used to time when the Auxiliary Device samples
DATA
Time from falling edge of line control bit to falling edge of clock 11 CLK
T8
5/25u s
5u s/
T9
u
5/25 s
T10
Time from rising edge of clock 11 to rising edge of line control bit
14