NT6881
9. Interrupt Controller
There are 10 interrupt sources: Timer, INT0, INT1, KBD, SUSP, IN0, IN1, IN2, OT0 and STUP.
9.1. Timer Interrupt
When the BASE TIMER overflows, it will set the TMR flag. If the interrupt is enabled by writing "1" to the bit 0 in IE_FUNC
($0002H), then it will interrupt 6502 CPU. The TMR flag can be read by software. Once set by an interrupt source, it can
read from bit0 in IRQFUNC ($0000H) and remains high unless cleared by writing "1" to the bit 0 in IRQCLRF ($0001H). All
of register's data are cleared to "0" at initialization by the system reset. When an interrupt occurs, the CPU jumps to
$FFFEH & $FFFFH to execute the interrupt service routine, thus the TMR flag must be cleared by software.
9.2. INT0 Interrupt
As soon as INT0 pin detects a falling edge trigger, NT6881 sets the INT0 flag ($0000H, bit1). After that, the 6502 CPU is
interrupted if this interrupt has already been enabled already by writing “ 1” to EINT0 ($0002H, bit1). If EINT0 flag is
cleared, 6502 CPU can’ t be INT0 interrupted even if the INT0 flag is set. INT0 flag can only be set by hardware and can not
be set or cleared directly by the software except for writing “ 1” to CINT0 ($0001H, bit1) flag to clear INT0 flag. When an
interrupt occurs, the CPU will jump to $FFFEH & $FFFFH to execute the interrupt service routine so the INT0 flag must be
cleared by software.
9.3. INT1 Interrupt
As soon as INT1 pin detects a falling edge trigger, NT6881 sets the INT1 flag ($0000H, bit2). Then the 6502 CPU is
interrupted if this interrupt has already been enabled already by writing “ 1” to EINT0 ($0002H, bit2). If EINT1 flag is
cleared, 6502 CPU can’ t be INT1 interrupted even if the INT1 flag is set. INT1 flag can only be set by hardware and can not
be set or cleared directly by the software except for writing “ 1” to CINT1 ($0001H, bit2) flag to clear INT1 flag. When an
interrupt occurs, the CPU will jump to $FFFEH & $FFFFH to execute the interrupt service routine so the INT1 flag must be
cleared by software.
9.4. KBD Interrupt
This interrupt will set the KBD flag ($0000H, bit3) every 4ms(HID 1.00 version) to indicate that keyboard scan data is ready
to send for endpoint1. And then 6502 CPU is interrupted if this interrupt has been enabled already by writing “ 1” to EKBD
($0002H, bit3). If the EKBD flag is cleared, 6502 CPU can’ t be KBD interrupted even if KBD flag is set. The KBD flag can
only be set by the hardware and can not be set or cleared directly by firmware except for writing “ 1” to CKBD ($0001H, bit
3) flag to clear KBD flag. When an interrupt occurs, CPU jumps to $FFFEH & $FFFFH to execute the interrupt service
routine, the KBD flag must be cleared by firmware.
9.5. IN0 Token Interrupt
When an IN TOKEN for endpoint 0 is done, it will set the IN0 flag. If this interrupt is enabled by writing "1" to EIN0 ($0005H,
bit0), it will interrupt 6502 CPU. When an interrupt occurs, the CPU jumps to $FFFEH & $FFFFH to execute the interrupt
service routine, the IN0 flag must be cleared by the software.
9.6. OT0 (OUT 0) Token Interrupt
When an OUT TOKEN for endpoint 0 is done, it will set the OT0 flag. If this interrupt is enabled by writing "1" to EOT0
($0005H, bit1), it will interrupt 6502 CPU. When an interrupt occurs, the CPU jumps to $FFFEH & $FFFFH to execute the
interrupt service routine, the OT0 flag must be cleared by the software.
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ETC [ ETC ]
