FSTARTOUT Frame Start Output
Output
FSTARTOUT is asserted during the first symbol in every
sync frame. The width of FSTARTOUT reflects the
number of bytes that the gap parameter inserts. A
one-cycle width indicates no inserted gaps; a width of 17
means 16 inserted bytes as an Reed-Solomon gap.
FSTARTOUT is applied only in sync word detection
mode. If FSTARTIN pulses force synchronization,
FSTARTOUT is constantly LOW.
SYNCOK
SYNC Detection/Phase Monitoring
Output
In internal sync mode, this pin indicates undisturbed
synchronization status when HIGH. This signal is
asserted when the number of track steps required for
synchronization is fulfilled. If FSTARTIN pulses force
synchronization, SYNCOK is constantly LOW.
5.4 Test Signals
FTMODE[2:0] Functional Test Bus
Input
Input
These must be tied to 0.
IDDTN[3]
IDD Test Mode
IDDTN is a production test pin.
NT_OUT[4]
Nand Tree Output
Output
NT_OUT is a production test pin.
SCAN_ENABLE[5]
Scan Enable
Input
Input
This pin enables scan chain shift.
TNn[11]
Test Output Enable
TNn switches all 3-state buffers to high-impedance mode
for testing.
TRSTn[10]
TMS[9]
Test Reset
Reset for the JTAG unit.
Input
Test Mode Select
Input
TMS selects the JTAG unit test mode.
TDO[8]
Test Data Output
Output
TDO is the JTAG unit data output.
Test Signals
5-5
ETC [ ETC ]
