HT46R47
In a PWM cycle, the duty cycle of each modula-
tion cycle is shown in the table.
I/O
I/P
O/P
I/P
Mode (Normal) (Normal) (PWM) (PWM)
O/P
Logical
Input
Logical Logical
Output Input
Parameter
AC (0~3) Duty Cycle
PD0
PWM
DC + 1
i<AC
64
It is recommended that unused or not bonded
out I/O lines should be set as output pins by
software instruction to avoid consuming power
under input floating state.
Modulation cycle i
(i=0~3)
DC
i³AC
64
The modulation frequency, cycle frequency and
cycle duty of the PWM output signal are sum-
marized in the following table.
PWM
The microcontroller provides 1 channel (6+2)
bits PWM output shared with PD0. The PWM
channel has its data register denoted as PWM
(1AH). The frequency source of the PWM coun-
ter comes from fSYS. The PWM register is an
eight bits register. The waveforms of PWM out-
put are as shown. Once the PD0 is selected as
the PWM output and the output function of
PD0 is enabled (PDC.0=²0²), writing 1 to PD0
data register will enable the PWM output func-
tion and writing ²0² will force the PD0 to stay
at ²0².
PWM
PWM Cycle PWM Cycle
Modulation
Frequency
Frequency
Duty
f
SYS/64
fSYS/256
[PWM]/256
A/D converter
The 4 channels and 9-bit resolution A/D (8-bit
accuracy) converter are implemented in this
microcontroller. The reference voltage is VDD.
The A/D converter contains 4 special registers
which are; ADRL (20H), ADRH (21H), ADCR
(22H) and ACSR (23H). The ADRH and ADRL
are A/D result register higher-order byte and
lower-order byte and are read-only. After the
A/D conversion is completed, the ADRH and
ADRL should be read to get the conversion re-
sult data. The ADCR is an A/D converter con-
trol register, which defines the A/D channel
number, analog channel select, start A/D con-
A PWM cycle is divided into four modulation cy-
cles (modulation cycle 0~modulation cycle 3).
Each modulation cycle has 64 PWM input clock
period. In a (6+2) bit PWM function, the con-
tents of the PWM register is divided into two
groups. Group 1 of the PWM register is denoted
by DC which is the value of PWM.7~PWM.2.
The group 2 is denoted by AC which is the value
of PWM.1~PWM.0.
f
S
Y
S
[
[
[
[
P
P
P
P
W
W
W
W
M
M
M
M
]
]
]
]
=
=
=
=
1
1
1
1
0
0
0
0
0
1
2
3
P
P
P
P
W
W
W
W
M
M
M
M
2
2
2
2
5
6
6
6
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
2
5
5
6
6
/
/
/
/
6
6
6
6
4
4
4
4
2
5
/
6
4
2
5
/
6
2
2
2
2
4
5
6
6
6
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
5
5
6
/
/
/
6
6
6
4
4
4
2
2
5
5
/
/
6
6
4
4
2
5
/
6
4
P
W
M
m
o
d
u
l
a
t
i
S
o
n
p
e
r
i
o
d
:
6
4
/
f
S
Y
P
W
M
2
c
5
y
S
c
6
Y
l
/
S
e
f
:
PWM
19
Rev. 1.40
July 18, 2001
ETC [ ETC ]
