3.3.22 ESMRAMC—Extended System Management RAM Control
Register (Device 0) ........................................................................3-29
3.3.23 RPS—SDRAM Row Page Size Register (Device 0)......................3-30
3.3.24 SDRAMC—SDRAM Control Register (Device 0) ..........................3-30
3.3.25 PGPOL—Paging Policy Register (Device 0) .................................3-32
3.3.26 PMCR—Power Management Control Register (Device 0) ............3-33
3.3.27 SCRR—Suspend CBR Refresh Rate Register (Device 0) ............3-34
3.3.28 EAP—Error Address Pointer Register (Device 0)..........................3-35
3.3.29 ERRCMD—Error Command Register (Device 0) ..........................3-36
3.3.30 ERRSTS—Error Status Register (Device 0)..................................3-37
3.3.31 ACAPID—AGP Capability Identifier Register (Device 0)...............3-38
3.3.32 AGPSTAT—AGP Status Register (Device 0)................................3-38
3.3.33 AGPCMD—AGP Command Register (Device 0)...........................3-39
3.3.34 AGPCTRL—AGP Control Register (Device 0) ..............................3-40
3.3.35 APSIZE—Aperture Size Register (Device 0).................................3-41
3.3.36 ATTBASE—Aperture Translation Table Base Register
(Device 0) ......................................................................................3-41
3.3.37 MBFS—Memory Buffer Frequency Select Register (Device 0).....3-42
3.3.38 BSPAD—BIOS Scratch Pad Register (Device 0) ..........................3-44
3.3.39 DWTC—DRAM Write Thermal Throttling Control Register
(Device 0) ......................................................................................3-45
3.3.40 DRTC—DRAM Read Thermal Throttling Control Register
(Device 0) ......................................................................................3-46
3.3.41 BUFFC—Buffer Control Register (Device 0) .................................3-47
PCI-to-PCI Bridge Registers (Device 1) .....................................................3-48
3.4.1 VID1—Vendor Identification Register (Device 1)...........................3-49
3.4.2 DID1—Device Identification Register (Device 1) ...........................3-49
3.4.3 PCICMD1—PCI-to-PCI Command Register (Device 1) ................3-50
3.4.4 PCISTS1—PCI-to-PCI Status Register (Device 1)........................3-51
3.4.5 RID1—Revision Identification Register (Device 1) ........................3-51
3.4.6 SUBC1—Sub-Class Code Register (Device 1) .............................3-52
3.4.7 BCC1—Base Class Code Register (Device 1) ..............................3-52
3.4.8 MLT1—Master Latency Timer Register (Device 1)........................3-52
3.4.9 HDR1—Header Type Register (Device 1).....................................3-53
3.4.10 PBUSN—Primary Bus Number Register (Device 1)......................3-53
3.4.11 SBUSN—Secondary Bus Number Register (Device 1).................3-53
3.4.12 SUBUSN—Subordinate Bus Number Register (Device 1) ............3-54
3.4.13 SMLT—Secondary Master Latency Timer Register (Device 1).....3-54
3.4.14 IOBASE—I/O Base Address Register (Device 1)..........................3-54
3.4.15 IOLIMIT—I/O Limit Address Register (Device 1)...........................3-55
3.4.16 SSTS—Secondary PCI-to-PCI Status Register (Device 1) ...........3-56
3.4.17 MBASE—Memory Base Address Register (Device 1)...................3-57
3.4.18 MLIMIT—Memory Limit Address Register (Device 1)....................3-57
3.4.19 PMBASE—Prefetchable Memory Base Address Register
3.4
(Device 1) ......................................................................................3-58
3.4.20 PMLIMIT—Prefetchable Memory Limit Address Register
(Device 1) ......................................................................................3-58
3.4.21 BCTRL—PCI-to-PCI Bridge Control Register (Device 1) ..............3-59
vi
82443BX Host Bridge Datasheet
ETC [ ETC ]
