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CT8022A11AQC 参数 Datasheet PDF下载

CT8022A11AQC图片预览
型号: CT8022A11AQC
PDF下载: 下载PDF文件 查看货源
内容描述: VOIP / VON G.723.1 , G279AB TRUESPEECH协处理器 [VOIP/VON G.723.1, G279AB TRUESPEECH CO-PROCESSOR]
分类和应用:
文件页数/大小: 194 页 / 1455 K
品牌: ETC [ ETC ]
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TrueSpeech® Co-Processor  
Terminating Playback:  
PRELIMINARY/CONFIDENTIAL  
Version: 1.18  
1. Host writes IDLE = 0000H command or STOP PLAYBACK = 5220H command to the Software Control  
Register.  
2. CT8022 terminates playback, discards data in its internal playback buffer, and clears TX Ready if set (in the  
Hardware Status Register).  
3. CT8022 writes status response to the Software Status Register.  
4. Host waits for STATUS READY indication in the Hardware Status Register, then reads the CT8022 response  
from the Software Status Register. This clears the STATUS READY bit.  
When either the Idle or Stop Playback command is used to terminate playback, the CT8022 will discard data in its  
internal playback buffer. In some cases, this may not be desired. For example, when playing back TrueSpeech 6.3  
data stored in a disk file, if either the Idle or Stop Playback command is issued immediately at end-of-file (EOF), the  
last 20 frames (600ms) of the message will not be played. The Host may wish to use the playback Buffer  
Monitoring command (5212H). With command, the Host can poll the CT8022 and wait until all the internally  
stored speech data has been played out before issuing the Idle or Stop Playback command.  
Note: After writing the Idle or Stop Playback command to terminate playback, the Host should not attempt  
to access the Host Transmit Data Buffer Access Port even if the TX Ready bit is set.  
Example 2: TrueSpeech 5.3 Playback via Host Receive Data Buffer Access Port - Host Interrupt  
This example shows how to start playback with TrueSpeech 5.3 using data transfers performed via the Host Transmit  
Data Buffer Access Port. The Host controller performs all data transfers in this example. The Host uses an interrupt  
service routine (ISR) to transfer data.  
Starting Playback  
1. CT8022 is in IDLE or RECORD state.  
2. Host checks for CONTROL READY state in Hardware Status Register.  
3. Host selects TrueSpeech 5.3 playback by writing the Select TrueSpeech Playback Rate command = 5232H to  
the Software Control Register.  
4. CT8022 responds via the Software Status Register.  
5. Host waits for STATUS READY indication in the Hardware Status Register, then reads the CT8022 response  
from the Software Status Register. This clears the STATUS READY bit.  
6. Host selects Poll Sync Mode for playback using the command 5202H.  
7. CT8022 responds via the Software Status Register.  
8. Host waits for STATUS READY indication in the Hardware Status Register, then reads the CT8022 response  
from the Software Status Register. This clears the STATUS READY bit.  
9. Host selects Playback by issuing the PLAYBACK C1 command = 2C03H or 2C01H via the Software Control  
Register. This also informs the CT8022 that data transfers will occur via the Host Transmit Data Buffer Access  
Port (TFR Mode = [binary] 11 or 01).  
10. CT8022 responds via the Software Status Register after a delay of up to 2 speech frame periods.  
11. Host waits for STATUS READY indication in the Hardware Status Register, then reads the CT8022 response  
from the Software Status Register S1 = 2C03H or 2C01H. This clears the STATUS READY bit.  
12. Host writes PLAYBACK C2 command = 2000H to the Software Control Register.  
13. CT8022 responds via the Software Status Register.  
14. Host waits for STATUS READY indication in the Hardware Status Register, then reads the CT8022 response  
from the Software Status Register S2 = 2000H. This clears the STATUS READY bit.  
15. Host writes PLAYBACK C3 command = 200AH to the Software Control Register. This command includes the  
requested number of words per frame to transfer. In this case (TrueSpeech 5.3) this is 10 = 0AH.  
16. CT8022 responds via the Software Status Register.  
17. Host waits for STATUS READY indication in the Hardware Status Register, then reads the CT8022 response  
from the Software Status Register S3 = 200AH. This clears the STATUS READY bit.  
18. Host sets up an ISR to service interrupts from the CT8022.  
19. Host programs the Hardware Control Register to generate an interrupt from the CT8022 on the TX Ready  
condition by writing 0402H ( Master Enable set, TX Ready IE set).  
74  
DSP GROUP, INC., 3120 SCOTT BOULEVARD CT8022A11AQC FW Revision 0118  
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490  
All specifications are subject to change without prior notice.  
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