VS1001K
VLSI
DATASHEET
y
Solution
3. PACKAGES AND PIN DESCRIPTIONS
3.3 LQFP-48
48
1
Figure 3: Pin Configuration, LQFP-48.
Pin Name
Pin
Pin Type
Function
nc
1,2
3
4
-
DI
PWR
-
XRESET
DGND0
nc
active low asynchronous reset
digital ground
5
DVDD0
nc
6
7
PWR
-
digital power supply
DREQ
DCLK
SDATA
nc
BSYNC
DVDD1
nc
DGND1
XTALO
XTALI
DVDD2
DGND2
DGND3
DGND4
XCS
8
9
DO
DI
DI
-
DI
PWR
-
PWR
AO
AI
PWR
PWR
PWR
PWR
DI
data request, input bus
serial input data bus clock
serial data input
10
11,12
13
14
15
16
17
18
19
20
21
22
23
24.. . 27
28
29
30
31
32
32
32
35,36
37
38
39
40
41
42
43
44
45
46
47
48
byte synchronization signal
digital power supply
digital ground
crystal output
crystal input
digital power supply
digital ground
digital ground
digital ground
chip select input (active low)
nc
SCLK
SI
SO
nc
-
DI
DI
DO3
-
clock for serial bus
serial input
serial output
TEST0
TEST1
TEST2
nc
AGND0
AVDD0
RIGHT
AGND1
AGND2
VCM
AVDD1
RCAP
AVDD2
LEFT
AGND3
nc
DI
reserved for test, connect to DVDD
reserved for test, do not connect!
reserved for test, do not connect!
DO
DO
-
PWR
PWR
AO
PWR
PWR
AO
PWR
AIO
PWR
AO
PWR
-
analog ground, low-noise reference
analog power supply
right channel output
analog ground
analog ground
feedback
analog power supply
capacitance for reference
analog power supply
left channel output
analog ground
For “Pin Types”, see Chapter 3.1. LQFP-48 package dimensions are at http://www.vlsi.fi/vs1001/lqfp48.pdf .
Version 4.11, 2003-09-18
13
ETC [ ETC ]
