NT5DS32M4AT
NT5DS16M8AT
128Mb Double Data Rate SDRAM
Write to Precharge: Non-Interrupting (Burst Length = 4)
Maximum DQSS
T1
T2
T3
T4
T5
T6
CK
CK
Write
NOP
NOP
NOP
NOP
PRE
Command
t
WR
BA a, COL b
BA (a or all)
Address
t
t
(max)
RP
DQSS
DQS
DQ
DI a-b
DM
Minimum DQSS
T1
T2
T3
T4
T5
T6
CK
CK
Write
NOP
NOP
NOP
NOP
PRE
Command
t
WR
BA a, COL b
BA (a or all)
Address
t
RP
t
(min)
DQSS
DQS
DQ
DI a-b
DM
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
t
is referenced from the first positive CK edge after the last data in pair.
WR
Don’ t Care
A10 is Low with the Write command (Auto Precharge is disabled).
39
REV 1.0
May, 2001
©
NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.