NT5DS32M4AT
NT5DS16M8AT
128Mb Double Data Rate SDRAM
Terminating a Read Burst: CAS Latencies (Burst Length = 8)
CAS Latency = 2
CK
CK
Read
NOP
BST
NOP
NOP
NOP
Command
Address
BAa,COLn
CL=2
DQS
DQ
DOa-n
No further output data after this point.
DQS tristated.
CAS Latency = 2.5
CK
CK
Read
NOP
BST
NOP
NOP
NOP
Command
Address
BAa, COL n
CL=2.5
DQS
DQ
DOa-n
No further output data after this point.
DQS tristated.
DO a-n = data out from bank a, column n.
Cases shown are bursts of 8 terminated after 4 data elements.
3 subsequent elements of data out appear in the programmed order following DO a-n.
Shown with nominal t , t , and t
Don’ t Care
.
AC DQSCK DQSQ
26
REV 1.0
May, 2001
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NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
ETC [ ETC ]
