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CXD3018Q/R 参数 Datasheet PDF下载

CXD3018Q/R图片预览
型号: CXD3018Q/R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置DigitalServo和DAC [CD Digital Signal Processor with Built-in DigitalServo and DAC ]
分类和应用: 数字信号处理器
文件页数/大小: 134 页 / 942 K
品牌: ETC [ ETC ]
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CXD3018Q/R  
§5-4. E:F Balance Adjustment Function (See Fig. 5-3.)  
When the disc is rotated with the laser on, and with the FCS (focus) servo on via FCS search, the traverse  
waveform appears in the TE signal due to disc eccentricity.  
In this condition, the low-frequency component can be extracted from the TE signal using the built-in TRK hold  
filter by setting D5 (TBLM) of $38 to 1.  
The extracted low-frequency component is loaded into the TRVSC register as a digital value, and the TRVSC  
register value is established when TBLM returns to 0.  
Next, setting D2 (TLC2) of $38 to 1 compensates the values obtained from the TE and SE input pins with the  
TRVSC register value (subtraction), allowing the E:F balance offset to be adjusted. (See Fig. 5-3.)  
§5-5. FCS Bias (Focus Bias) Adjustment Function  
The FBIAS register value can be added to the FCS servo filter input by setting D14 (FBON) of $3A to 1. (See  
Fig. 5-3.)  
When D11 = 0 and D10 = 1 is set by $34F, the FBIAS register value can be written using the 9-bit value of D9  
to D1 (D9: MSB).  
In addition, the RF jitter can be monitored by setting the $8 command SOCT to 1. (See "DSP Block Timing  
Chart".)  
89 –  
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