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CXD3018Q/R 参数 Datasheet PDF下载

CXD3018Q/R图片预览
型号: CXD3018Q/R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置DigitalServo和DAC [CD Digital Signal Processor with Built-in DigitalServo and DAC ]
分类和应用: 数字信号处理器
文件页数/大小: 134 页 / 942 K
品牌: ETC [ ETC ]
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CXD3018Q/R  
AGCNTL default operation has two stages.  
In the first stage, rough adjustment is performed with high sensitivity for a certain period of time (select  
256/128ms with AGHT, when MCK = 128Fs), and the AGCNTL coefficient approaches the appropriate value.  
The sensitivity at this time can be selected from two types with AGV1.  
In the second stage, the AGCNTL coefficient is finely adjusted with relatively low sensitivity to further approach  
the appropriate value. The sensitivity for the second stage can be selected from two types with AGV2. In the  
second stage of default operation, when the AGCNTL coefficient reaches the appropriate value and stops  
changing, the CXD3018Q/R confirms that the AGCNTL coefficient has not changed for a certain period of time  
(select 63/31ms with AGHJ, when MCK = 128Fs), and then completes AGCNTL operation. (Self-stop mode)  
This self-stop mode can be canceled by setting AGS to 0.  
In addition, the first stage is omitted for AGCNTL operation when AGHS is set to 0.  
An example of AGCNTL coefficient transitions during AGCNTL operation with various settings is shown in  
Fig. 5-5.  
Initial value  
Slope AGV1  
AGCNTL coefficient value  
Slope AGV2  
Convergence value  
AGHT  
AGJ  
AGCNTL  
Start  
AGCNTL  
completion  
SENS  
Fig. 5-5  
Note) Fig. 5-5 shows the case where the AGCCNTL coefficient converges from the initial value to a smaller  
value.  
92 –  
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