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CXD3018Q/R 参数 Datasheet PDF下载

CXD3018Q/R图片预览
型号: CXD3018Q/R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置DigitalServo和DAC [CD Digital Signal Processor with Built-in DigitalServo and DAC ]
分类和应用: 数字信号处理器
文件页数/大小: 134 页 / 942 K
品牌: ETC [ ETC ]
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CXD3018Q/R  
Contents  
§1. CPU Interface  
§1-1.  
§1-2.  
§1-3.  
§1-4.  
CPU Interface Timing .......................................................................................................................................... 16  
CPU Interface Command Table .......................................................................................................................... 16  
CPU Command Presets ...................................................................................................................................... 27  
Description of SENS Signals and Commands .................................................................................................... 33  
§2. Subcode Interface  
§2-1.  
§2-2.  
P to W Subcode Readout .................................................................................................................................... 55  
80-bit Sub Q Readout .......................................................................................................................................... 55  
§3. Description of Modes  
§3-1.  
§3-2.  
§3-3.  
§3-4.  
CLV-N Mode ........................................................................................................................................................ 60  
CLV-W Mode ....................................................................................................................................................... 60  
CAV-W Mode ...................................................................................................................................................... 60  
VCO-C Mode ....................................................................................................................................................... 61  
§4. Description of Other Functions  
§4-1.  
§4-2.  
§4-3.  
§4-4.  
§4-5.  
§4-6.  
§4-7.  
§4-8.  
§4-9.  
Channel Clock Regeneration by the Digital PLL Circuit ...................................................................................... 64  
Frame Sync Protection ........................................................................................................................................ 66  
Error Correction ................................................................................................................................................... 66  
DA Interface ........................................................................................................................................................ 67  
Digital Out ............................................................................................................................................................ 69  
Servo Auto Sequence ......................................................................................................................................... 69  
Digital CLV .......................................................................................................................................................... 76  
CD-DSP Block Playback Speed .......................................................................................................................... 77  
DAC Block Playback Speed ................................................................................................................................ 77  
§4-10. DAC Block Input Timing ...................................................................................................................................... 78  
§4-11. Description of DAC Block Functions ................................................................................................................... 78  
§4-12. LPF Block ............................................................................................................................................................ 82  
§4-13. Asymmetry Compensation .................................................................................................................................. 83  
§4-14. CD Text Data Demodulation ............................................................................................................................... 84  
§5. Description of Servo Signal Processing System Functions and Commands  
§5-1.  
§5-2.  
§5-3.  
§5-4.  
§5-5.  
§5-6.  
§5-7.  
§5-8.  
§5-9.  
General Description of Servo Signal Processing System ................................................................................... 86  
Digital Servo Block Master Clock (MCK) ............................................................................................................. 87  
DC Offset Cancel [AVRG Measurement and Compensation] ............................................................................. 88  
E:F Balance Adjustment Function ....................................................................................................................... 89  
FCS Bias Adjustment Function ........................................................................................................................... 89  
AGCNTL Function ............................................................................................................................................... 91  
FCS Servo and FCS Search ............................................................................................................................... 93  
TRK and SLD Servo Control ............................................................................................................................... 94  
MIRR and DFCT Signal Generation .................................................................................................................... 95  
§5-10. DFCT Countermeasure Circuit ............................................................................................................................ 96  
§5-11. Anti-shock Circuit ................................................................................................................................................ 96  
§5-12. Brake Circuit ........................................................................................................................................................ 97  
§5-13. COUT Signal ....................................................................................................................................................... 98  
§5-14. Serial Readout Circuit ......................................................................................................................................... 98  
§5-15. Writing to the Coefficient RAM ............................................................................................................................ 99  
§5-16. PWM Output ........................................................................................................................................................ 99  
§5-17. Servo Status Changes Produced by the LOCK Signal ..................................................................................... 100  
§5-18. Description of Commands and Data Sets ......................................................................................................... 100  
§5-19. List of Servo Filter Coefficients .......................................................................................................................... 124  
§5-20. Filter Composition ............................................................................................................................................. 126  
§5-21. TRACKING and FOCUS Frequency Response ................................................................................................ 132  
§6. Application Circuit ..................................................................................................................................................... 133  
Explanation of abbreviations  
AVRG:  
Average  
AGCNTL: Auto gain control  
FCS:  
TRK:  
SLD:  
DFCT:  
Focus  
Tracking  
Sled  
Defect  
15 –  
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