CXA1782CQ/CR
Notes on Operation
1. FSET pin
The FSET pin determines the fc for the focus and tracking high-frequency phase compensation.
2. ISET pin
ISET current = 1.27V/R
= Focus search current
= Tracking jump current
1
2
= Sled kick current ($1X: PS1 = PS0 = 0) ×
Use the setting resistance within the range of 120kΩ to 240kΩ. If the resistance value is out of this range,
the oscillation may be occurred in the ISET block.
3. FE (focus error)/TE (tracking error) gain changing method
1) High gain: Resistance between FE pins (pins 6 and 7) 100kΩ → Large
Resistance between TE pins (pins 12 and 13) 100kΩ → Large
2) Low gain: A signal, whose resistance is divided between Pins 1 and 2, is input to FE. The internal gain
adjustment circuit is used for TE.
4. Input voltage at Pins 19 to 22 of the microcomputer interface should be as follows:
VIH VCC × 90% or more
VIL VCC × 10% or less
5. Focus OK circuit
1) Refer to the “Description of Operation” for the time constant setting of the focus OK amplifier LPF and the
mirror amplifier HPF.
VCC
20k
FOK
25
40k
The FOK and comparator output are as follows:
RL
Output voltage High: VFOKH ≈ near VCC
100k
Output voltage Low: VFOKL ≈ Vsat (NPN)
VCC
VEE
VEE
6. Sled amplifier
The sled amplifier may oscillate when used by the buffer amplifier. Use with a gain of approximately 20dB.
Sled/Tracking internal phase compensation and reference design material
Item
1.2kHz gain
1.2kHz phase
1.2kHz gain
1.2kHz phase
2.7kHz gain
2.7kHz phase
SD
Measurement pin
6
Conditions
Typ.
21.5
63
Unit
dB
08
08
25
25
CFLB = 0.1µF
CFGD = 0.1µF
deg
dB
13
–125
26.5
–130
deg
dB
13
CTGU = 0.1µF
25→13
25→13
deg
– 30 –
ETC [ ETC ]
