CXA1782CQ/CR
CPU Serial Interface Timing Chart
D0
D1
D2
D3
tSU
D4
D5
D6
D7
D0
DATA
CLK
tWCK
tWCK
th
tCD
1/fck
tD
XLT
tWL
(VCC = 3.0V)
Item
Clock frequency
Symbol Min.
fck
Type.
Max.
1
Unit
MHz
ns
Clock pulse width
Setup time
fwck
tsu
th
500
500
ns
ns
Hold time
500
ns
Delay time
t
t
t
D
500
ns
Latch pulse width
Data transfer interval
WL
CD
1000
1000
ns
System Control
ADRESS
DATA
SENS
output
Item
D3
D2
D1
D0
D7 D6 D5 D4
FS4
Focus
ON = 1, OFF = 0
DEFECT (FS3) FS2
FS1
Search
ON = 1, OFF = 0 Up = 1, Down = 0
Focus Control
0
0
0
0
Disable = 1
Enable = 0
Search
FZC
TG1, TG2
ON = 1, OFF = 0
Brake
Sled
Sled
Kick + 1
Tracking Control
Tracking Mode
Select
DEFECT
TZC
0
0
0
0
0
0
0
1
1
1
0
1
ON = 1, OFF = 0 Kick + 2
1
2
Tracking Mode
Sled Mode
Gain/Bal
Automatic tracking adjustment mode
1
2
TRACKING MODE
D3
SLED MODE
D2
D0
0
D1
0
0
1
0
1
0
0
1
1
OFF
OFF
1
0
ON
ON
0
1
FWD JUMP
REV JUMP
FWD MOVE
REV MOVE
1
1
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ETC [ ETC ]
