UL62H256A
Symbol
35
55
Switching Characteristics
Read Cycle
Unit
Max.
Alt.
tRC
tAA
tACE
tOE
IEC
tcR
Min.
Max.
Min.
Read Cycle Time
35
55
ns
Address Access Time to Data Valid
Chip Enable Access Time to Data Valid
G LOW to Data Valid
ta(A)
35
35
15
12
12
55
55
25
15
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ta(E)
ta(G)
tdis(E)
tdis(G)
ten(E)
ten(G)
tv(A)
E HIGH to Output in High-Z
G HIGH to Output in High-Z
E LOW to Output in Low-Z
G LOW to Output in Low-Z
Output Hold Time from Address Change
E LOW to Power-Up Time
tHZCE
tHZOE
tLZCE
tLZOE
tOH
3
0
3
0
3
0
3
0
tPU
E HIGH to Power-Down Time
tPD
35
55
Symbol
35
55
Switching Characteristics
Write Cycle
Unit
Min.
35
20
20
0
Max.
Min.
55
35
35
0
Max.
Alt.
tWC
IEC
tcW
Write Cycle Time
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Pulse Width
tWP
tw(W)
tsu(W)
tsu(A)
Write Setup Time
tWP
Address Setup Time
tAS
t
Address Valid to End of Write
Chip Enable Setup Time
Pulse Width Chip Enable to End of Write
Data Setup Time
tAW
25
25
25
15
0
40
40
40
25
0
su(A-WH)
tCW
tsu(E)
tCW
tw(E)
tsu(D)
th(D)
tDS
Data Hold Time
tDH
Address Hold from End of Write
W LOW to Output in High-Z
G HIGH to Output in High-Z
W HIGH to Output in Low-Z
G LOW to Output in Low-Z
tAH
th(A)
0
0
tHZWE
tHZOE
tLZWE
tLZOE
tdis(W)
tdis(G)
ten(W)
ten(G)
15
12
20
15
0
0
0
0
May 07, 2004
5