Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
93
Table 58. UART Baud Rates
20.0 MHz System Clock
18.432 MHz System Clock
Desired Rate
BRG Divisor
Actual Rate
Error
Desired Rate
BRG Divisor
Actual Rate
Error
(kHz)
1250.0
625.0
250.0
115.2
57.6
(Decimal)
1
(kHz)
1250.0
625.0
250.0
113.6
56.8
(%)
0.00
0.00
0.00
-1.36
-1.36
-1.36
0.16
0.16
0.16
-0.03
-0.03
0.02
-0.01
(kHz)
1250.0
625.0
250.0
115.2
57.6
(Decimal)
1
(kHz)
1152.0
576.0
230.4
115.2
57.6
(%)
-7.84%
-7.84%
-7.84%
0.00
2
2
5
5
11
10
22
20
0.00
38.4
33
37.9
38.4
30
38.4
0.00
19.2
65
19.2
19.2
60
19.2
0.00
9.60
130
260
521
1042
2083
4167
9.62
9.60
120
240
480
960
1920
3840
9.60
0.00
4.80
4.81
4.80
4.80
0.00
2.40
2.40
2.40
2.40
0.00
1.20
1.20
1.20
1.20
0.00
0.60
0.60
0.60
0.60
0.00
0.30
0.30
0.30
0.30
0.00
16.667 MHz System Clock
11.0592 MHz System Clock
Desired Rate
BRG Divisor
Actual Rate
Error
Desired Rate
BRG Divisor
Actual Rate
Error
(kHz)
1250.0
625.0
250.0
115.2
57.6
(Decimal)
(kHz)
1041.69
520.8
260.4
115.7
57.87
38.6
(%)
-16.67
-16.67
4.17
(kHz)
1250.0
625.0
250.0
115.2
57.6
(Decimal)
N/A
1
(kHz)
N/A
(%)
N/A
10.59
-7.84
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
1
2
691.2
230.4
115.2
57.6
38.4
19.2
9.60
4.80
2.40
1.20
0.60
0.30
4
3
9
0.47
6
18
0.47
12
38.4
27
0.47
38.4
18
19.2
54
19.3
0.47
19.2
36
9.60
109
217
434
868
1736
3472
9.56
-0.45
-0.83
0.01
9.60
72
4.80
4.80
4.80
144
288
576
1152
2304
2.40
2.40
2.40
1.20
1.20
0.01
1.20
0.60
0.60
0.01
0.60
0.30
0.30
0.01
0.30
PS017610-0404
UART
ZILOG [ ZILOG, INC. ]
