Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
92
Table 57. UARTx Baud Rate Low Byte Register (UxBRL)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
BRL
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/w
F47H and F4FH
ADDR
The UART data rate is calculated using the following equation:
System Clock Frequency (Hz)
----------------------------------------------------------------------------------------------
UART Baud Rate (bits/s) =
16 × UART Baud Rate Divisor Value
For a given UART data rate, the integer baud rate divisor value is calculated using the fol-
lowing equation:
System Clock Frequency (Hz)
16 × UART Data Rate (bits/s)
⎛
⎝
⎞
⎠
---------------------------------------------------------------------------
UART Baud Rate Divisor Value (BRG) = Round
The baud rate error relative to the desired baud rate is calculated using the following equa-
tion:
Actual Data Rate – Desired Data Rate
⎛
⎝
⎞
⎠
------------------------------------------------------------------------------------------------
UART Baud Rate Error (%) = 100 ×
Desired Data Rate
For reliable communication, the UART baud rate error must never exceed 5 percent.
Table 58 provides information on data rate errors for popular baud rates and commonly
used crystal oscillator frequencies.
PS017610-0404
UART
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