Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
28
threshold voltage, VVBO) and forces the device into the Reset state. While the supply volt-
age remains below the Power-On Reset voltage threshold (VPOR), the VBO block holds
the Z8F640x family device in the Reset state.
After the supply voltage again exceeds the Power-On Reset voltage threshold, the
Z8F640x family device progresses through a full System Reset sequence, as described in
the Power-On Reset section. Following Power-On Reset, the PORstatus bit in the Watch-
Dog Timer Control (WDTCTL) register is set to 1. Figure 63 illustrates Voltage Brown-
Out operation. Refer to the Electrical Characteristics chapter for the VBO and POR
threshold voltages (VVBO and VPOR).
Stop mode disables the Voltage Brown-Out detector.
VCC = 3.3V
VCC = 3.3V
VPOR
VVBO
Program
Voltage
Program
Execution
Brownout
Execution
WDT Clock
Crystal Oscillator
XOUT
Internal RESET
signal
POR
XTAL
counter delay
counter delay
Figure 63. Voltage Brown-Out Reset Operation (not to scale)
Watch-Dog Timer Reset
If the device is in normal or Halt mode, the Watch-Dog Timer can initiate a System Reset
at time-out if the WDT_RESOption Bit is set to 1. This is the default (unprogrammed) set-
ting of the WDT_RESOption Bit. The WDTstatus bit in the WDT Control register is set to
signify that the reset was initiated by the Watch-Dog Timer.
PS017610-0404
Reset and Stop Mode Recovery
ZILOG [ ZILOG, INC. ]
