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Z8F1602AR020EC 参数 Datasheet PDF下载

Z8F1602AR020EC图片预览
型号: Z8F1602AR020EC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采微控制器与闪存和10位A / D转换器 [Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter]
分类和应用: 转换器闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 246 页 / 1767 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x  
Z8 Encore!®  
156  
ister. When the Watchpoint event occurs, the Z8F640x family device enters Debug mode  
and the DBGMODEbit in the OCDCTL register becomes 1.  
Runtime Counter  
The On-Chip Debugger contains a 16-bit Runtime Counter. It counts system clock cycles  
between Breakpoints. The counter starts counting when the On-Chip Debugger leaves  
Debug mode and stops counting when it enters Debug mode again or when it reaches the  
maximum count of FFFFH.  
On-Chip Debugger Commands  
The host communicates to the On-Chip Debugger by sending OCD commands using the  
DBG interface. During normal operation of the Z8F640x family device, only a subset of  
the OCD commands are available. In Debug mode, all OCD commands become available  
unless the user code and control registers are protected by programming the Read Protect  
Option Bit (RP). The Read Protect Option Bit prevents the code in memory from being  
read out of the Z8F640x family device. When this option is enabled, several of the OCD  
commands are disabled. Table 93 contains a summary of the On-Chip Debugger com-  
mands. Each OCD command is described in further detail in the bulleted list following  
Table 93. Table 93 indicates those commands that operate when the Z8F640x family  
device is not in Debug mode (normal operation) and those commands that are disabled by  
programming the Read Protect Option Bit.  
Table 93. On-Chip Debugger Commands  
Enabled when NOT  
Command Byte in Debug mode?  
Disabled by  
Read Protect Option Bit  
Debug Command  
Read OCD Revision  
Reserved  
00H  
01H  
02H  
03H  
04H  
05H  
06H  
07H  
08H  
Yes  
-
-
Yes  
-
-
Read OCD Status Register  
Read Runtime Counter  
Write OCD Control Register  
Read OCD Control Register  
Write Program Counter  
Read Program Counter  
Write Register  
-
-
Yes  
Yes  
-
Cannot clear DBGMODEbit  
-
Disabled  
Disabled  
-
-
Only writes of the Flash Memory Control  
registers are allowed. Additionally, only the  
Mass Erase command is allowed to be  
written to the Flash Control register.  
Read Register  
09H  
-
Disabled  
PS017610-0404  
On-Chip Debugger  
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