Z8 Encore! XP® F08xA Series
Product Specification
33
Direct LED Drive
The Port C pins provide a current sinked output capable of driving an LED without requir-
ing an external resistor. The output sinks current at programmable levels of 3mA, 7mA,
13mA and 20mA. This mode is enabled through the Alternate Function sub-register AFS1
and is programmable through the LED control registers.
For correct function, the LED anode must be connected to VDD and the cathode to the
GPIO pin.
Using all Port C pins in LED drive mode with maximum current may result in excessive
total current. Refer to the “Electrical Characteristics” on page 191 for the maximum total
current for the applicable package.
Shared Reset Pin
On the 20 and 28-pin devices, the Port D0 pin shares function with a bi-directional reset
pin. Unlike all other I/O pins, this pin does not default to GPIO function on power-up.
This pin acts as a bi-directional reset until user software re-configures it. The Port D0 pin
is output-only when in GPIO mode.
Crystal Oscillator Override
For systems using a crystal oscillator, PA0 and PA1 are used to connect the crystal. When
the crystal oscillator is enabled (see “Oscillator Control Register Definitions” on page 163),
the GPIO settings are overridden and PA0 and PA1 are disabled.
5V Tolerance
In the 20- and 28-pin versions of this device, any pin which shares functionality with an
ADC, crystal or comparator port is not 5V-tolerant, including PA[1:0], PB[5:0] and
PC[2:0]. All other signal pins are 5V-tolerant, and can safely handle inputs higher than
VDD even with the pull-ups enabled.
External Clock Setup
For systems using an external TTL drive, PB3 is the clock source for 20- and 28-pin
devices. In this case, configure PB3 for alternate function CLKIN. Write the Oscillator
Control Register (page 163) such that the external oscillator is selected as the system clock
For 8-pin devices use PA1 instead of PB3.
PS024705-0405
P R E L I M I N A R Y
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
