Z8 Encore! XP® 4K Series
Product Specification
124
ADC Control Register Definitions
ADC Control Register 0
The ADC Control Register 0 (ADCCTL0) selects the analog input channel and initiates
the analog-to-digital conversion. It also selects the voltage reference configuration.
Table 72. ADC Control Register 0 (ADCCTL0)
7
6
5
4
CONT
0
3
2
1
0
BITS
CEN
0
REFSELL REFOUT
ANAIN[3:0]
FIELD
RESET
R/W
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
F70H
ADDR
CEN—Conversion Enable
0 = Conversion is complete. Writing a 0 produces no effect. The ADC automatically clears
this bit to 0 when a conversion is complete.
1 = Begin conversion. Writing a 1 to this bit starts a conversion. If a conversion is already
in progress, the conversion restarts. This bit remains 1 until the conversion is complete.
REFSELL—Voltage Reference Level Select Low Bit; in conjunction with the High bit
(REFSELH) in ADC Control/Status Register 1, this determines the level of the internal
voltage reference; the following details the effects of {REFSELH, REFSELL}; note that
this reference is independent of the Comparator reference
00= Internal Reference Disabled, reference comes from external pin
01= Internal Reference set to 1.0 V
10= Internal Reference set to 2.0 V (default)
11= Reserved
REFOUT - Internal Reference Output Enable
0 = Reference buffer is disabled; Vref pin is available for GPIO or analog functions
1 = The internal ADC reference is buffered and driven out to the Vref pin
When the ADC is used with an external reference ({REFSELH,REFSELL}=00), the
REFOUT bit must be set to 0.
Warning:
CONT
0 = Single-shot conversion. ADC data is output once at completion of the 5129 system
clock cycles (measurements of the internal temperature sensor take twice as long)
1 = Continuous conversion. ADC data updated every 256 system clock cycles after an ini-
tial 5129 clock conversion (measurements of the internal temperature sensor take twice as
long)
PS022815-0206
Analog-to-Digital Converter
ZILOG [ ZILOG, INC. ]
