Z8 Encore! XP® 4K Series
Product Specification
107
The UART data rate is calculated using the following equation:
System Clock Frequency (Hz)
UART Baud Rate (bits/s) = ----------------------------------------------------------------------------------------------
16 × UART Baud Rate Divisor Value
For a given UART data rate, calculate the integer baud rate divisor value using the follow-
ing equation:
System Clock Frequency (Hz)
16 × UART Data Rate (bits/s)
⎛
⎝
⎞
⎠
---------------------------------------------------------------------------
UART Baud Rate Divisor Value (BRG) = Round
The baud rate error relative to the acceptable baud rate is calculated using the following
equation:
Actual Data Rate – Desired Data Rate
⎛
⎝
⎞
⎠
------------------------------------------------------------------------------------------------
UART Baud Rate Error (%) = 100 ×
Desired Data Rate
For reliable communication, the UART baud rate error must never exceed 5 percent.
Table 71 provides information about data rate errors for popular baud rates and commonly
used crystal oscillator frequencies.
Table 71. UART Baud Rates
10.0 MHz System Clock
Acceptable BRG Divisor Actual Rate Error
5.5296 MHz System Clock
Acceptable BRG Divisor Actual Rate Error
Rate (KHz)
1250.0
625.0
250.0
115.2
57.6
(Decimal)
N/A
1
(KHz)
(%)
Rate (KHz)
1250.0
625.0
250.0
115.2
57.6
(Decimal)
N/A
N/A
1
(KHz)
(%)
N/A
N/A
N/A
N/A
625.0
208.33
125.0
56.8
0.00
-16.67
8.51
-1.36
1.73
0.16
0.16
0.16
-0.03
-0.03
-0.03
0.2
N/A
N/A
3
345.6
115.2
57.6
38.4
19.2
9.60
4.80
2.40
1.20
0.60
0.30
38.24
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
5
3
11
6
38.4
16
39.1
38.4
9
19.2
33
18.9
19.2
18
9.60
65
9.62
9.60
36
4.80
130
260
521
1042
2083
4.81
4.80
72
2.40
2.40
2.40
144
288
576
1152
1.20
1.20
1.20
0.60
0.60
0.60
0.30
0.30
0.30
PS022815-0206
UART
ZILOG [ ZILOG, INC. ]
