欢迎访问ic37.com |
会员登录 免费注册
发布采购

Z8601720ASC 参数 Datasheet PDF下载

Z8601720ASC图片预览
型号: Z8601720ASC
PDF下载: 下载PDF文件 查看货源
内容描述: PCMCIA接口方案 [PCMCIA Interface Solution]
分类和应用: 总线控制器微控制器和处理器外围集成电路PC时钟
文件页数/大小: 138 页 / 1062 K
品牌: ZILOG [ ZILOG, INC. ]
 浏览型号Z8601720ASC的Datasheet PDF文件第50页浏览型号Z8601720ASC的Datasheet PDF文件第51页浏览型号Z8601720ASC的Datasheet PDF文件第52页浏览型号Z8601720ASC的Datasheet PDF文件第53页浏览型号Z8601720ASC的Datasheet PDF文件第55页浏览型号Z8601720ASC的Datasheet PDF文件第56页浏览型号Z8601720ASC的Datasheet PDF文件第57页浏览型号Z8601720ASC的Datasheet PDF文件第58页  
Z86017/Z16017 PCMCIA Interface Solution  
Product Specification  
40  
Table 13. Interrupt Enable Register: Address 01h (Continued)  
Bit Placement Bit Name  
Bit 6 CCR0_OVERIDE  
Description  
ATA_DASP is used as a DASP pin. Also see Register 02h.  
Card Con•guration Register 0 is normally written after  
Power-On Reset by the PCMCIA host. If Interrupts are  
allowed by the local processor or EEPROM, then the  
PCMCIA READY/BSY signal is configured as an  
interrupt signal only when the Card Configuration Register  
is written. If the local processor does not require the  
PCMCIA host to write to CCR0, bit CCR0_OVERIDE can  
be set to force the internal logic to select the PCMCIA  
READY/BSY as the Interrupt pin, if interrupts are enabled.  
This bit is active when set to 1. On Power-On Reset, set  
this bit to 0, no override selected. PCMCIA host must  
select interrupts and write to the Card Con•guration  
Register 0.  
Bit 7  
EN_INPACK  
Enable PCMCIA Input acknowledge when set to 1. On  
Power-On Reset, this bit is set to 0.  
PS012002-1201  
Programming Internal Registers  
 复制成功!