eZ80L92 MCU
Product Specification
188
Table 108. Input/Output Instructions
Mnemonic
OUT0
Instruction
Output to I/O on Page 0
OUTD (OTDR)
OUTD2 (OTD2R)
OUTI (OTIR)
OUTI2 (OTI2R)
TSTIO
Output to I/O and Decrement (with Repeat)
Output to I/O and Decrement (with Repeat)
Output to I/O and Increment (with Repeat)
Output to I/O and Increment (with Repeat)
Test I/O
Table 108. Load Instructions
Mnemonic
LD
Instruction
Load
LEA
Load Effective Address
PEA
Push Effective Address
POP
Pop
PUSH
Push
Table 108. Logical Instructions
Mnemonic
AND
Instruction
Logical AND
CPL
Complement Accumulator
Logical OR
OR
TST
Test Accumulator
Logical Exclusive OR
XOR
Table 108. Processor Control Instructions
Mnemonic
CCF
Instruction
Complement Carry Flag
Disable Interrupts
DI
PS013015-0316
eZ80® CPU Instruction Set