eZ80L92 MCU
Product Specification
104
Universal Asynchronous Receiver/
Transmitter
The UART module implements the logic required to support various asynchronous
communications protocols. The module also implements two separate 16-byte-deep
FIFOs for both transmission and reception. A block diagram of the UART is illustrated
in Figure 23.
System Clock
Receive
RxD0/RxD1
Buffer
I/O Address
Transmit
Buffer
Data
TxD0/TxD1
Interrupt Signal
CTS0/CTS1
RTS0/RTS1
DSR0/DSR1
DTR0/DTR1
DCD0/DCD1
RI0/RI1
Modem
Control
Logic
Figure 23. UART Block Diagram
The UART module provides the following asynchronous communication protocol-related
features and functions:
•
•
•
•
•
•
5-bit, 6-bit, 7-bit, or 8-bit data transmission
Even parity/odd parity or no parity bit generation and detection
Start and stop bit generation and detection (supports up to two stop bits)
Line break detection and generation
Receiver overrun and framing errors detection
Logic and associated I/O to provide modem handshake capability
PS013015-0316
Universal Asynchronous Receiver/Transmitter
ZILOG [ ZILOG, INC. ]
