ZL50022
Data Sheet
In variable delay mode, the delay depends on the combination of the source and destination channels of the input
and output streams.
m = input channel number
n = output channel number
n-m <= 0
0 < n-m < 7
n-m = 7
STio >= STi
n-m
n-m > 7
STio < STi
1 frame + (n-m)
Table 4 - Delay for Variable Delay Mode
T = Delay between input and output 1 frame - (m-n)
For example, if Stream 4 Channel 2 is switched to Stream 5 Channel 9 with variable delay, the data will be output in
the same 125 µs frame. Contrarily, if Stream 6 Channel 1 is switched to Stream 9 Channel 3, the information will
appear in the following frame.
Frame N + 1
Frame N
STi4
CH2
L-2 L-1 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9
L-2 L-1 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9
L-2 L-1 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9
L-2 L-1 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9
L-2 L-1 CH0 CH1 CH2 CH3
L-2 L-1 CH0 CH1 CH2 CH3
L-2 L-1 CH0 CH1 CH2 CH3
L-2 L-1 CH0 CH1 CH2 CH3
STio5
CH9
STi6
CH1
STio9
CH3
L = last channel = 31, 63, 127, or 255 for 2.048 Mbps, 4.096 Mbps 8.192 Mbps, or 16.384 Mbps respectively
Figure 19 - Data Throughput Delay for Variable Delay
8.2 Constant Delay Mode
In this mode, frame integrity is maintained in all switching configurations. The delay though the switch is 2 frames -
Input Channel + Output Channel. This can result in a minimum of 1 frame + 1 channel delay if the last channel on a
stream is switched to the first channel of a stream. The maximum delay is 3 frames - 1 channel. This occurs when
the first channel of a stream is switched to the last channel of a stream. The constant delay mode is available for all
output channels.
The data throughput delay is expressed as a function of ST-BUS/GCI-Bus frames, input channel number (m) and
output channel number (n). The data throughput delay (T) is:
T = 2 frames + (n - m)
The constant delay mode is controlled by V/C (bit 14) in the Connection Memory Low when CMM = 0. When this bit
is set low, the channel is in constant delay mode. If VAREN (bit 4) in the Control Register (CR) is set (to enable
variable throughput delay on a chip-wide basis), the device can still be programmed to operate in constant delay
mode.
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Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
