PDSP16256/A
Electrical Characteristics
The Electrical Characteristics are guaranteed over the following range of operating conditions, unless
otherwise stated:
Commercial: TAMB = 0°C to+70°C, VDD = +5V±5%, GND = 0V
IndustriaL: TAMB = -40°C to +85°C, VDD = +5V±10%, GND = 0V
Military: TAMB = -55°C to +125°C, VDD = +5V±10%, GND = 0V
Static Characteristics
Characteristic
Value
Units
Symbol
Conditions
Min. Typ. Max.
Output high voltage
Output low voltage
VOH
VOL
VIH
VIL
VIH
VIL
IIN
CIN
IOZ
IOS
2·4
-
3·5
-
2·0
-
210
-
0·4
-
1·0
-
V
V
V
V
V
IOH = 4mA
OH = 4mA
I
Input high voltage (CMOS)
Input low voltage (CMOS)
Input high voltage (TTL)
Input low voltage (TTL)
Input leakage current
Input capacitance
SCLK input only
SCLK input only
All other inputs
All other inputs
GND < VIN < VDD
0·8
110
V
µA
pF
µA
mA
10
Output leakage current
Output short circuit current
250
10
150
300
GND < VOUT < VDD
VDD = 15·5V
Switching Characteristics (see Figs. 20, 21 and 22)
Commercial Industrial
Military
Units
Characteristic
Symbol
Conditions
Min. Max.
Min. Max.
Max.
Min.
Input signal setup to clock rising edge
Input signal hold after clock rising edge
tHS
tHH
8
4
-
-
8
4
-
-
ns
ns
8
4
-
-
OEN
OEN
tOS
-
-
26
25
-
20
4
5
-
-
28
20
-
set up to clock rising edge
hold after clock rising edge
20
4
5
20
4
5
-
-
28
20
-
ns
ns
ns
MHz
ns
ns
ns
ns
mA
tOH
tCD
fSCLK
tCH
Clock rising edge to output signal valid
Clock frequency
Clock high time
Clock low time
Clock to data valid F bus from high impedance
Clock to data high impedance F bus
30pF
-
-
-
20
12
-
18
11
-
-
-
20
12
-
tCL
-
-
-
tCVF
tCZF
IDD
30
30
400
30
30
380
30
30
380
See Fig. 23
See Fig. 23
See Note 1
-
-
VDD current
NOTE 1. VDD = 15·5V, outputs unloaded, clock frequency = Max.
21
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
