Data Sheet
MT88E45B
Line Reversal (Optionally sent)
First Complete
Ring Cycle
Mark
D
Ch. seizure
C
Data
E
Ring Burst
A
A/B Wires
B
F
Note 2
Note 1
50-150ms
250-400ms
PWDN
Note 3
TE DC load
TE AC load
FSKen
Note 3
tCP
tCA
CD
A = 200-450ms
B ≥ 500ms
C = 80-262ms
D = 45-262ms
E ≤ 2.5s (typ. 500ms)
F >200ms
DR
Note 4
DCLK
DATA
OSC2
Note: Parameter
F
..101010..
Data
from "CCA Exceptions
Document Issue 3"
tPU
tPD
Figure 18 - Application Timing for UK’s CCA Caller Display Service (CDS), e.g., CLIP
Notes:
1) From TW/P&E/312. Start time: The CPE should enter the signalling state by applying the DC and AC terminations within this time
after the end of the ring burst.
2) End time: The CPE should leave the signalling state by removing the DC and AC terminations within this time after the end of Data,
indicated by CD returning to high. The MT88E45B should also be taken out of FSK mode at this time to prevent the FSK
demodulator from reacting to other in-band signals such as speech, and DTMF tones.
3) PWDN and FSKen are internal signals decoded from CB0/1/2.
4) This signal represents the mode of the DR/STD pin.
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