MT88E39
Vdd
R
2
MT88E39
IN+
Vdd
RING
Data Sheet
Vdd
TIP
C1
R
1
D1
D2
100 nF
20%
V
DD
IC
Vdd
Vdd
R
9
*
1
C2
R
3
D3
D4
R
4
R
5
R
6
R
7
IN-
GS
V
Ref
CAP
MODE
PWDN
CD
DR
DATA
DCLK
R
8
*
1
100 nF
20%
D5
D7
D6
D8
1N5231B
OSC1
Xtal
OSC2
V
SS
100 nF
10%
50 V
(FSK interface mode 0 selected)
Vdd
= To microcontroller
= From microcontroller
200 K
5%
Motorola
4N25
464 K
5%
(Ring Detect)
10 nF
To microcontroller
330 nF R10
10%
250 V
Note:
*1 R8 and R9 not required when FSK interface mode 1 is selected.
Unless stated otherwise, resistors are 1%, 0.1 Watt; capacitors are 5%, 6.3 V
D1, D2, D3, D4 = diodes, 1N4003 or 1N4148 or equivalent
D5, D6, D7, D8 = bridge rectifier diodes, 1N914
Xtal = 3.579545 MHz, +/-0.2%
R8 = R9 = 100 K, 20%
R10 = 12K1, 1W5, 5%, Fusible resistor
R2 = R4 = 34 K
For 1000 Vrms, 60 Hz isolation from Tip to Earth and Ring to Earth:
R1 = R3 = 430 K, 0.5 W, 5%, 475 V minimum. e.g., IRC Type GS-3
C1 = C2 = 2 n2, 1332 V minimum
If the 1000Vrms is met by other means, then this circuit has to meet FCC part 68 Type B Ringing:
R1 = R3 = 432 K, 0.1 W, 1%, 56 V minimum
C1 = C2 = 2n2, 212V minimum
Example of component values for Vdd = 5 V +/- 10%
For Bellcore applications, set input gain = 0 dB:
For ETSI applications, set input gain = -2.5 dB:
R5 = 53K6
R5 = 53K6
R6 = 60K4
R6 = 63K4
R7 = 464K
R7 = 348K
Example of component values for Vdd = 3 V +/- 10%
For Bellcore applications, set input gain = -3 dB:
For ETSI applications, set input gain = -5.5 dB:
R5 = 44K2
R5 = 44K2
R6 = 51K1
R6 = 53K6
R7 = 332K
R7 = 249K
Figure 6 - Application Circuit
7
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
