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MT8880CSR1 参数 Datasheet PDF下载

MT8880CSR1图片预览
型号: MT8880CSR1
PDF下载: 下载PDF文件 查看货源
内容描述: [DTMF Signaling Circuit, CMOS, PDSO20, 0.300 INCH, LEAD FREE, MS-013AC, SOIC-20]
分类和应用: 电信光电二极管电信集成电路
文件页数/大小: 28 页 / 611 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT8880C  
Data Sheet  
Equation 1, which is the ratio of the total power of all the extraneous frequencies to the power of the fundamental  
frequency expressed as a percentage. The Fourier components of the tone output correspond to V2f.... Vnf as  
measured on the output waveform. The total harmonic distortion for a dual tone can be calculated using Equation 2.  
VL and VH correspond to the low group amplitude and high group amplitude, respectively, and V2IMD is the sum of all the  
intermodulation components. The internal switched-capacitor filter following the D/A converter keeps distortion products  
down to a very low level as shown in Figure 10.  
EXPLANATION OF EVENTS  
A)  
B)  
C)  
TONE BURSTS DETECTED, TONE DURATION INVALID, RX DATA REGISTER NOT UPDATED.  
TONE #n DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN RX DATA REGISTER.  
END OF TONE #n DETECTED, TONE ABSENT DURATION VALID, INFORMATION IN RX DATA REGISTER RETAINED  
UNTIL NEXT VALID TONE PAIR.  
D)  
E)  
F)  
TONE #n+1 DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN RX DATA REGISTER.  
ACCEPTABLE DROPOUT OF TONE #n+1, TONE ABSENT DURATION INVALID, DATA REMAINS UNCHANGED.  
END OF TONE #n+1 DETECTED, TONE ABSENT DURATION VALID, INFORMATION IN RX DATA REGISTER  
RETAINED UNTIL NEXT VALID TONE PAIR.  
EXPLANATION OF SYMBOLS  
Vin  
DTMF COMPOSITE INPUT SIGNAL.  
ESt  
EARLY STEERING OUTPUT. INDICATES DETECTION OF VALID TONE FREQUENCIES.  
STEERING INPUT/GUARD TIME OUTPUT. DRIVES EXTERNAL RC TIMING CIRCUIT.  
4-BIT DECODED DATA IN RECEIVE DATA REGISTER  
St/GT  
RX0-RX3  
b3  
DELAYED STEERING. INDICATES THAT VALID FREQUENCIES HAVE BEEN PRESENT/ABSENT FOR THE REQUIRED  
GUARD TIME THUS CONSTITUTING A VALID SIGNAL. ACTIVE LOW FOR THE DURATION OF A VALID DTMF  
SIGNAL.  
b2  
INDICATES THAT VALID DATA IS IN THE RECEIVE DATA REGISTER. THE BIT IS CLEARED AFTER THE STATUS  
REGISTER IS READ.  
IRQ/CP  
INTERRUPT IS ACTIVE INDICATING THAT NEW DATA IS IN THE RX DATA REGISTER. THE INTERRUPT IS CLEARED  
AFTER THE STATUS REGISTER IS READ.  
tREC  
tREC  
tID  
tDO  
tDP  
MAXIMUM DTMF SIGNAL DURATION NOT DETECTED AS VALID.  
MINIMUM DTMF SIGNAL DURATION REQUIRED FOR VALID RECOGNITION.  
MINIMUM TIME BETWEEN VALID SEQUENTIAL DTMF SIGNALS.  
MAXIMUM ALLOWABLE DROPOUT DURING VALID DTMF SIGNAL.  
TIME TO DETECT VALID FREQUENCIES PRESENT.  
tDA  
tGTP  
tGTA  
TIME TO DETECT VALID FREQUENCIES ABSENT.  
GUARD TIME, TONE PRESENT.  
GUARD TIME, TONE ABSENT.  
Figure 11 - Description of Timing Events  
V22f + V23f + V24f + .... V2  
nf  
THD(%) = 100  
Vfundamental  
Equation 1. THD (%) For a Single Tone  
10  
Zarlink Semiconductor Inc.  
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