Le79228
Data Sheet
No.
Item
Condition
Min
Typ
Max
Unit
Note
Gain from VSAB1–VSAB4 to VHL1–
VHL4 (KRFB)
23
VFD = 1
–4.8
–5
–5.2
V/V
VSAB1–VSAB4 to VHL1–VHL4 output
offset (KRFB)
Gain from VSAB1–VSAB4 to VHL1–
VHL4
24
25
–50
–
0
50
–
mV
V/V
VFD = 0, hook bit
feedback
–0.128
% error of VLB1–VLB4 voltage (For
VLB equation, see the Chip Set User’s
Guide)
26
% of input voltage
–5
0
+5
%
Capacitance load on VLB1–VLB4
27
28
0
0
—
—
120
400
pF
2.
Capacitance load on XSB1–XSB4,
XSC
One channel active
(VE790 series ISLIC
state register set to
active); three channels
inactive (VE790 series
ISLIC state register set
to Standby)
—
183
235
29
Power Dissipation
All channels active
(VE790 series ISLIC
state register set to
Active)
All channels inactive
(VE790 series ISLIC
state register set to
Standby)
mW
—
—
264
143
340
188
Transmission Specifications
Table 1. 0 dBm0 Voltage Definitions with Unity Gain in X, R, GX, GR, AX, and AR
Signal at Digital Interface
A-law digital mW or equivalent (0 dBm0)
µ-law digital mW or equivalent (0 dBm0)
±5,800 peak linear coded sine wave
Transmit
0.5026
0.4987
0.5026
Receive
0.5026
0.4987
0.5025
Unit
Vrms
Note: Expressed voltage levels on VOUT or input to VIN are equivalent to a digital milliwatt on the digital interface.
13
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
