Le79228
Data Sheet
Pin Name
Type
Description
The LD pins output 3-level voltages. When LDi is a logic 0 (< 0.4 V), the destination of the code on P1–P3 is the
relay control latches in the VE790 series ISLIC device control register. When LDi is a logic 1 (>VCC−0.4 V), the
destination of P1–P3 is the mode control latches. LDi is driven to VREF when the contents of the VE790 series
ISLIC device control register must not change.
LD1–LD4
Output
For PCM backplane operation, the DSP master clock may connect here. A signal is required only for PCM
backplane operation when PCLK is not used as the master clock. MCLK can be a wide variety of frequencies, but
must be synchronous to FS. Upon initialization, the MCLK input is disabled, and relevant circuitry is driven by a
connection to PCLK. This pin is 5-V tolerant.
For PCM operation, this is PCM Clock. PCM operation is selected by the presence of a PCLK signal on this pin
in conjunction with the FS on the FS/DCL pin (see above). For PCM backplane operation, connect a data clock,
which determines the rate at which PCM data is serially shifted into or out of the PCM ports. PCLK can be any
integer multiple of the FS frequency. The minimum clock frequency for linear/ companded data plus signaling data
is 256 kHz. For GCI operation, this pin is Frame Sync. The FS signal is an 8 kHz pulse that identifies the beginning
of a frame. The Le79228 Quad ISLAC device references individual timeslots with respect to this input, which must
be synchronized to DCL. This pin is 5-V tolerant.
MCLK
Input
Input
PCLK/FS
P1–P3
Output
Input
Control the operating modes of the VE790 series ISLIC devices connected to the Le79228 Quad ISLAC device.
Resistors that sense the high, low and positive battery voltages connect here. If only one negative battery is used,
connect both negative battery resistors to the same supply. If two negative batteries are used, SHB must be
connected to the battery intended to supply on-hook voltage, whether BATH or BATL. If the positive battery is not
used, leave the SPB pin unconnected. These pins are current inputs whose voltage is held at VREF.
SHB,
SLB, SPB
For PCM backplane operation, TSCA is active low when PCM data is output on the DXA or DXB pins,
respectively. The outputs are open-drain and are normally inactive (high impedance). Pull-up loads should be
connected to VCCD. When GCI mode is selected, one of two GCI modes may be selected by connecting TSCA/
G to DGND or VCCD.
Output
(PCM)
TSCA/G
TSCB
Input (GCI)
For PCM backplane operation, TSCA or TSCB is active low when PCM data is output on the DXA or DXB pins,
respectively. The outputs are open-drain and are normally inactive (high impedance). Pull-up loads should be
connected to VCCD. TSCB is only available on the 80 pin LQFP package. When GCI mode is selected, one of
two GCI modes may be selected by connecting TSCA/G to DGND or VCCD. TSCB is available only on the 80-
pin LQFP package.
Output
VCCA1–
VCCA4
VCCD
VHL1–
VHL4
Supply
Supply
Output
+3.3 VDC supplies to the analog sections in each of the four channels.
+3.3 VDC supply to all digital sections.
High-level loop control. Voltages on these pins are used to control DC-feed, internal ringing, metering and polarity
reversal for each VE790 series ISLIC device.
Analog transmit signals (VTX) from each VE790 series ISLIC device connect to these pins. The Le79228 Quad
ISLAC device converts these signals to digital words and processes them. After processing, they are multiplexed
into serial time slots and sent out of the DXA/DU or DXB pin. Tie pin to VREF if channel unused.
Analog receive voltage signals are sent out of the Le79228 Quad ISLAC device from these pins. A resistor
converts these signals to currents which drive the VE790 series ISLIC device.
Normally connected to VCCA internally. They supply longitudinal reference voltages to the VE790 series ISLIC
devices during certain test procedures. These outputs are connected internally to VCCA during VE790 series
ISLIC Active, Standby, Ringing, and Disconnect modes. During test modes, it can be connected to the receive D/A.
VIN1–
VIN4
Input
Output
Output
VOUT1–
VOUT4
VLB1–
VLB4
This pin provides a 1.4-V, single-ended reference to the VE790 series ISLIC devices to which the Le79228 Quad
VREF
Output
Input
ISLAC device is connected.
VSAB1–
VSAB4
Connect to the VSAB pins of four VE790 series ISLIC device channels.
XSB1–
XSB4
External ringing sense pin. This pin senses the current through RSRB to measure the ringing voltage on the line.
External ring generator sense. This pin senses the current RSRC to measure the ringing bus voltage.
Input
Input
XSC
Package Type
Pin Options
I/O1–I/O4
DRB, DXB, TSCB
DIN/S1
DOUT
DIO/S1
80 pin
64 pin
√
√
√
√
x
√
x
x
x
x
√
x
GS11–GS14, GS21–GS24
Note: For the 80-pin LQFP package, DOUT and DIN/S1 can be connected together.
10
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
