Le78D11
Data Sheet
Indication (VMWI). It allows the called Customer Premises Equipment (CPE) to receive a calling party's name and directory
number along with the date and time of the call.
There are a number of protocols defined, which the chip set can support. In one case the information is sent between the first
and second ring bursts, starting as early as 500 ms after the first ring, and ending at least 200 ms before the second ring burst.
The information is sent using analog, phase coherent FSK at a 1200 bps rate. The Le78D11 VoSLAC device is designed to
provide this feature and can be programmed to initiate or terminate the Caller ID stream as required.
Teletax Generation
Teletax signals send call charge information to the subscriber equipment. These signals are normally sent during the Active
Normal mode. The Le78D11 VoSLAC device supports teletax through metering tone bursts which are summed into the receive
path DAC and output on VOUT. The 12 or 16 kHz metering burst ramps up over 20ms to the metering target level, MVO, when
the teletax state is selected, and ramps back down when the active state is selected. MVO is specified as the peak value of the
metering voltage (0 to 1020 mV) at the VOUT pin. If the ABRUPT bit is set, the 12 or 16 kHz signal ramps up or down almost
immediately (< 5 ms).
Line Measurement
There is one line measurement block per Le78D11 VoSLAC device, which allows measurement of various line and circuit
parameters such as leakage resistance, line capacitance, ringer capacitance, receiver off hook, foreign voltage, idle channel
noise, echo gain, etc. Most tests are performed in combination with appropriate signal generation. When a line measurement is
initiated, the adaptive feature of the echo cancellation filter is frozen for both channels. The line measurement block automatically
connects to the enabled channel.
The Le78D11 VoSLAC device returns incorrect Rloop values in Polarity Reversal states. To measure loop resistance in the
Polarity Reversal state, the user must read Vab and Vimt, then compute the resistance. Disable Filter 1 and Filter 2 before taking
the line measurements on Vimt or Vab inputs (CLM1=001 or CLM1=0110).
Band Gap Voltage Reference
All analog reference voltages are derived from a band gap reference with a very low temperature coefficient. Bias currents are
derived from the IREF pin current.
CONNECTION DIAGRAM
44 43 42 41 40 39 38 37 36 35 34
1
33
32
31
30
29
28
27
26
25
24
23
VIN2
AGND 2
VOUT2
VCCA 2
F2
IMT1
VIN1
AGND1
VOUT1
VCCA1
F1
2
3
4
5
6
C32
44-pin TQFP
7
C22
C31
8
C12
C21
9
CHCLK
DGND 2
INT/S2
C11
10
11
DGND1
RS
12 13 14 15 16 17 18 19 20 21 22
Note:
1. Pin 1 is marked for orientation.
10
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