Le58083
Data Sheet
Figure 16. Master Clock Timing
37
40
V
IH
V
IL
41
39
38
GCI Timing Specifications
Symbol
Signal
Parameter
Min
Typ
Max
Unit
Notes
t , t
DCL
Rise/fall time
DCL jitter
60
R
F
F
F
= 2.048 kHz
= 4.096 kHz
50
50
DCL
DCL
J
DCL
DCL
1
DCL
Period
F
F
= 2.048 kHz
= 4.096 kHz
488
244
DCL
DCL
t
DCL
t
, t
DCL
FS
Pulse width
Rise/fall time
Setup time
90
2
WH WL
t , t
60
R
F
ns
t
t
– 50
DCL
FS
70
50
SF
t
FS
Hold time
HF
t
FS
High pulse width
130
WFH
t
DU
DU
DD
DD
Delay from DCL edge
Delay from FS edge
Data setup
100
150
DDC
t
DDF
t
twH + 20
50
SD
t
Data hold
HD
Notes:
1. If DCL has jitter, care must be taken to ensure that all setup, hold, and pulse width requirements are met.
2. The Data Clock (DCL) can be stopped in the high or low state without loss of information.
27
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