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GP2021/IG/GQ2N 参数 Datasheet PDF下载

GP2021/IG/GQ2N图片预览
型号: GP2021/IG/GQ2N
PDF下载: 下载PDF文件 查看货源
内容描述: [Correlator, 16-Bit, CMOS, PQFP80, 14 X 14 MM, 2 MM HEIGHT, LEAD FREE, MS-022BC, MQFP-80]
分类和应用: 时钟外围集成电路
文件页数/大小: 63 页 / 540 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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GP2021
Description
ARM system mode
Standard interface mode
Pin
24
Signal name
ACCUM_INT
Type
O
25
MEAS_INT
O
26
NBW/WRPROG
I
27
NMREQ/DISCIP2
I
28
NOPC/NINTELMOT
I
29
NRW/DISCIP3
I
O
30
MCLK/NC
31
ABORT/MICRO_CLK
O
32
33
DISCIO
A22/READ
I/O
I
36
A21/NCS
I
37
A20/WREN
I
38-45 A<9:2>
46
A1/ALE_IP
I
I
47
A0/NRESET_IP
I
A free running interrupt to the microprocessor. It allows control of data transfer
between the accumulators in the correlator and the microprocessor. It is active
low when configured for ARM System mode or Motorola mode and is active high
in Intel mode.
An interrupt to the microprocessor. It allows control of measurement data transfer
between the correlator and the microprocessor. It is active Low when configured
for ARM System mode or Motorola mode and is active High in Intel mode.
Byte/Word
input
from
the Write-Read Program input. In Intel
microprocessor. Low indicates a byte mode, High selects 486 interface and
transfer, and high a word transfer.
low 186 style. Unused in Motorola mode
Memory Request input from the Multi-purpose discrete input.
microprocessor. Low indicates that the
microprocessor requires a memory
access during the following cycle.
Opcode fetch input from the High selects Motorola mode and low
microprocessor. Low indicates that an Intel mode.
instruction is being fetched and igh that
data is being transferred.
Read/Write Select input from the Multi-purpose discrete input.
microprocessor. Low indicates a read
cycle and high a write cycle.
Microprocessor Clock output (nominally Unused output (do not connect).
20MHz). Its phases can be stretched
under control of the Microprocessor
Interface.
Abort output to the microprocessor. 20MHz Clock output. Provides a 20MHz
Generates a valid ARM Data Abort clock with a 1:1 mark-to-space ratio.
sequence, triggered by a rising edge at
MULTI_FN_IO if this function is enabled.
Multi-purpose discrete input/output. After a GP2021 reset it is configured as an
input.
Address input from the microprocessor. Read input from the microprocessor. In
A<22:20> are decoded to select the Intel mode it is the active low read strobe.
address space partitioning.
In Motorola mode it is the Read (high)/
Write (low) select line.
Address input from the microprocessor. GP2021 Chip Select input (active low).
A<22:20> are decoded to select the
address space partitioning.
Address input from the microprocessor Write-Read Strobe input from the
A<22:20> are decoded to select the microprocessor. In Intel mode it is the
address space partitioning.
active low write strobe. In Motorola mode
it is the active high Write-Read strobe.
Address Inputs <9:2> from the microprocessor. These allow register selection.
Address input 1 from the micro- Address Latch Enable input from
processor. A<1:0> are decoded to microprocessor (active high)
provide individual byte write selection via
NW<3:0>.
Address input 0 from the micro- Reset input (active low).
processor. A<1:0> are decoded to
provide individual byte write selection via
NW<3:0>.
Table 2 Pin descriptions (continued)
cont…
5